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| author | ptitSeb <sebastien.chev@gmail.com> | 2023-06-27 13:53:52 +0200 |
|---|---|---|
| committer | ptitSeb <sebastien.chev@gmail.com> | 2023-06-27 13:53:52 +0200 |
| commit | 144db5f07f8ff2754cc78e99a71262fad1d711e0 (patch) | |
| tree | b2fbdb3328abaaf3b5b3432ea7087706977122f4 /src/libtools/signals.c | |
| parent | dc0ab611c46502f115dc68c5d924f4834511216a (diff) | |
| download | box64-144db5f07f8ff2754cc78e99a71262fad1d711e0.tar.gz box64-144db5f07f8ff2754cc78e99a71262fad1d711e0.zip | |
Reworked a bit privileged instruction ([32BITS] too)(ARM64_DYNAREC] too)
Diffstat (limited to 'src/libtools/signals.c')
| -rwxr-xr-x | src/libtools/signals.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/libtools/signals.c b/src/libtools/signals.c index a5804b9e..f66896e2 100755 --- a/src/libtools/signals.c +++ b/src/libtools/signals.c @@ -724,7 +724,7 @@ void my_sigactionhandler_oldcode(int32_t sig, int simple, siginfo_t* info, void else sigcontext->uc_mcontext.gregs[X64_TRAPNO] = 14; // PAGE_FAULT } else { - sigcontext->uc_mcontext.gregs[X64_TRAPNO] = (info->si_code == SEGV_ACCERR)?13:14; + sigcontext->uc_mcontext.gregs[X64_TRAPNO] = (info->si_code == SEGV_ACCERR)?14:13; //X64_ERR seems to be INT:8 CODE:8. So for write access segfault it's 0x0002 For a read it's 0x0004 (and 8 for exec). For an int 2d it could be 0x2D01 for example sigcontext->uc_mcontext.gregs[X64_ERR] = 0x0004; // read error? there is no execute control in box64 anyway } |