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authorYang Liu <liuyang22@iscas.ac.cn>2025-10-10 21:59:31 +0800
committerGitHub <noreply@github.com>2025-10-10 15:59:31 +0200
commit65b6f716d5f8fc766391771715e4ac40637ff74a (patch)
tree4443b755197b82cd84673975f547db645bb6013a /src
parent70ab16a6d6c54c83a6f9f678c5bbe1c104c6a672 (diff)
downloadbox64-65b6f716d5f8fc766391771715e4ac40637ff74a.tar.gz
box64-65b6f716d5f8fc766391771715e4ac40637ff74a.zip
[DYNAREC] Fixed 66 8D opcode and also a regression introduced in last commit (#3050)
Diffstat (limited to 'src')
-rw-r--r--src/dynarec/arm64/dynarec_arm64_66.c12
-rw-r--r--src/dynarec/arm64/dynarec_arm64_f0.c2
-rw-r--r--src/dynarec/la64/dynarec_la64_f0.c2
-rw-r--r--src/dynarec/rv64/dynarec_rv64_f0.c2
4 files changed, 8 insertions, 10 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_66.c b/src/dynarec/arm64/dynarec_arm64_66.c
index 1119f0a1..1e1daeaf 100644
--- a/src/dynarec/arm64/dynarec_arm64_66.c
+++ b/src/dynarec/arm64/dynarec_arm64_66.c
@@ -706,13 +706,11 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             if(MODREG) {   // reg <= reg? that's an invalid operation

                 DEFAULT;

             } else {                    // mem <= reg

-                addr = geted(dyn, addr, ninst, nextop, &ed, gd, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0);

-                if(gd!=ed) {    // it's sometimes used as a 3 bytes NOP

-                    if(rex.w)

-                        MOVx_REG(gd, ed);

-                    else

-                        BFIx(gd, ed, 0, 16);

-                }

+                addr = geted(dyn, addr, ninst, nextop, &ed, x3, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0);

+                if (rex.w)

+                    MOVx_REG(gd, ed);

+                else

+                    BFIx(gd, ed, 0, 16);

             }

             break;

         case 0x8E:

diff --git a/src/dynarec/arm64/dynarec_arm64_f0.c b/src/dynarec/arm64/dynarec_arm64_f0.c
index 491bbe3c..b90aaa3b 100644
--- a/src/dynarec/arm64/dynarec_arm64_f0.c
+++ b/src/dynarec/arm64/dynarec_arm64_f0.c
@@ -380,7 +380,7 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
                                     // done
                                     if (!rex.w) { B_MARK_nocond; }
                                     MOVxw_REG(xRAX, x1);
-                                    if(!ALIGNED_ATOMICxw && rex.w) {
+                                    if (!ALIGNED_ATOMICxw) {
                                         B_MARK_nocond;
                                     }
                                 }
diff --git a/src/dynarec/la64/dynarec_la64_f0.c b/src/dynarec/la64/dynarec_la64_f0.c
index a45508be..a6594702 100644
--- a/src/dynarec/la64/dynarec_la64_f0.c
+++ b/src/dynarec/la64/dynarec_la64_f0.c
@@ -194,7 +194,7 @@ uintptr_t dynarec64_F0(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni
                                 BEQZ_MARKLOCK(x4);
                                 if (!rex.w) { B_MARK_nocond; }
                                 MVxw(xRAX, x1);
-                                if (rex.w) { B_MARK_nocond; }
+                                B_MARK_nocond;
                                 MARK3;
                                 // Unaligned
                                 ADDI_D(x5, xZR, -(1 << (rex.w + 2)));
diff --git a/src/dynarec/rv64/dynarec_rv64_f0.c b/src/dynarec/rv64/dynarec_rv64_f0.c
index 5f1db176..544a8c11 100644
--- a/src/dynarec/rv64/dynarec_rv64_f0.c
+++ b/src/dynarec/rv64/dynarec_rv64_f0.c
@@ -267,7 +267,7 @@ uintptr_t dynarec64_F0(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni
                                 BNEZ_MARKLOCK(x4);
                                 if (!rex.w) { B_MARK_nocond; }
                                 MVxw(xRAX, x1);
-                                if (rex.w) { B_MARK_nocond; }
+                                B_MARK_nocond;
                                 MARK3;
                                 // Unaligned
                                 ANDI(x5, wback, -(1 << (rex.w + 2)));