diff options
| -rw-r--r-- | src/dynarec/arm64/arm64_emitter.h | 143 | ||||
| -rw-r--r-- | src/dynarec/arm64/arm64_mapping.h | 148 | ||||
| -rw-r--r-- | src/dynarec/la64/la64_emitter.h | 125 | ||||
| -rw-r--r-- | src/dynarec/la64/la64_mapping.h | 130 | ||||
| -rw-r--r-- | src/libtools/signal32.c | 36 | ||||
| -rw-r--r-- | src/libtools/signals.c | 221 |
6 files changed, 345 insertions, 458 deletions
diff --git a/src/dynarec/arm64/arm64_emitter.h b/src/dynarec/arm64/arm64_emitter.h index e41d9df8..c1359e1b 100644 --- a/src/dynarec/arm64/arm64_emitter.h +++ b/src/dynarec/arm64/arm64_emitter.h @@ -5,148 +5,7 @@ */ -/* - ARM64 Linux Call Convention - -SP The Stack Pointer. -r30 LR The Link Register. -r29 FP The Frame Pointer -r19…r28 Callee-saved registers -r18 The Platform Register, if needed; otherwise a temporary register. See notes. -r17 IP1 The second intra-procedure-call temporary register (can be used by call veneers and PLT code); at other times may be used as a temporary register. -r16 IP0 The first intra-procedure-call scratch register (can be used by call veneers and PLT code); at other times may be used as a temporary register. -r9…r15 Temporary registers -r8 Indirect result location register -r0…r7 Parameter/result registers - -For SIMD: -The first eight registers, v0-v7, are used to pass argument values into a subroutine and to return result values from a function. - They may also be used to hold intermediate values within a routine (but, in general, only between subroutine calls). - -Registers v8-v15 must be preserved by a callee across subroutine calls; - the remaining registers (v0-v7, v16-v31) do not need to be preserved (or should be preserved by the caller). - Additionally, only the bottom 64 bits of each value stored in v8-v15 need to be preserved [8]; - it is the responsibility of the caller to preserve larger values. - -For SVE: -z0-z7 are used to pass scalable vector arguments to a subroutine, and to return scalable vector results from a function. - If a subroutine takes at least one argument in scalable vector registers or scalable predicate registers, - or returns results in such regisers, the subroutine must ensure that the entire contents of z8-z23 are preserved across the call. - In other cases it need only preserve the low 64 bits of z8-z15, as described in SIMD and Floating-Point registers. -p0-p3 are used to pass scalable predicate arguments to a subroutine and to return scalable predicate results from a function. - If a subroutine takes at least one argument in scalable vector registers or scalable predicate registers, - or returns results in such registers, the subroutine must ensure that p4-p15 are preserved across the call. - In other cases it need not preserve any scalable predicate register contents. - -*/ - -// x86 Register mapping -#define xRAX 10 -#define xRCX 11 -#define xRDX 12 -#define xRBX 13 -#define xRSP 14 -#define xRBP 15 -#define xRSI 16 -#define xRDI 17 -#define xR8 18 -#define xR9 19 -#define xR10 20 -#define xR11 21 -#define xR12 22 -#define xR13 23 -#define xR14 24 -#define xR15 25 -#define xFlags 26 -#define xRIP 27 -#define xSavedSP 28 - -// convert a x86 register to native according to the register mapping -#define TO_NAT(A) (xRAX + (A)) - -// 32bits version -#define wEAX xRAX -#define wECX xRCX -#define wEDX xRDX -#define wEBX xRBX -#define wESP xRSP -#define wEBP xRBP -#define wESI xRSI -#define wEDI xRDI -#define wR8 xR8 -#define wR9 xR9 -#define wR10 xR10 -#define wR11 xR11 -#define wR12 xR12 -#define wR13 xR13 -#define wR14 xR14 -#define wR15 xR15 -#define wFlags xFlags -// scratch registers -#define x1 1 -#define x2 2 -#define x3 3 -#define x4 4 -#define x5 5 -#define x6 6 -#define x87pc 7 -// x87 can be a scratch, but check if it's used as x87 PC and restore if needed in that case -// 32bits version of scratch -#define w1 x1 -#define w2 x2 -#define w3 x3 -#define w4 x4 -#define w5 x5 -#define w6 x6 -#define w87pc x87pc -// emu is r0 -#define xEmu 0 -// ARM64 LR -#define xLR 30 -// ARM64 SP is r31 but is a special register -#define xSP 31 -// xZR regs is 31 -#define xZR 31 -#define wZR xZR - -// conditions -// Z == 1 -#define cEQ 0b0000 -// Z != 1 -#define cNE 0b0001 -// C == 1 -#define cCS 0b0010 -// C == 1 -#define cHS cCS -// C != 1 -#define cCC 0b0011 -// C != 1 -#define cLO cCC -// N == 1 -#define cMI 0b0100 -// N != 1 -#define cPL 0b0101 -// V == 1 -#define cVS 0b0110 -// V != 1 -#define cVC 0b0111 -// C == 1 && Z == 0 -#define cHI 0b1000 -// C !=1 || Z == 1 -#define cLS 0b1001 -// N == V -#define cGE 0b1010 -// N != V -#define cLT 0b1011 -// N == V && Z == 0 -#define cGT 0b1100 -// N != V || Z == 1 -#define cLE 0b1101 -// always -#define c__ 0b1110 - -//FCMP type of opcode produce: -// if any NAN: CV / v1 == v2: ZC / v1 < v2: N / v1 > v2: C +#include "arm64_mapping.h" int convert_bitmask(uint64_t bitmask); #define convert_bitmask_w(A) convert_bitmask(((uint64_t)(A) << 32) + (uint32_t)(A)) diff --git a/src/dynarec/arm64/arm64_mapping.h b/src/dynarec/arm64/arm64_mapping.h new file mode 100644 index 00000000..3e59f02d --- /dev/null +++ b/src/dynarec/arm64/arm64_mapping.h @@ -0,0 +1,148 @@ +#ifndef __ARM64_MAPPING_H__ +#define __ARM64_MAPPING_H__ + + +/* + ARM64 Linux Call Convention + +SP The Stack Pointer. +r30 LR The Link Register. +r29 FP The Frame Pointer +r19…r28 Callee-saved registers +r18 The Platform Register, if needed; otherwise a temporary register. See notes. +r17 IP1 The second intra-procedure-call temporary register (can be used by call veneers and PLT code); at other times may be used as a temporary register. +r16 IP0 The first intra-procedure-call scratch register (can be used by call veneers and PLT code); at other times may be used as a temporary register. +r9…r15 Temporary registers +r8 Indirect result location register +r0…r7 Parameter/result registers + +For SIMD: +The first eight registers, v0-v7, are used to pass argument values into a subroutine and to return result values from a function. + They may also be used to hold intermediate values within a routine (but, in general, only between subroutine calls). + +Registers v8-v15 must be preserved by a callee across subroutine calls; + the remaining registers (v0-v7, v16-v31) do not need to be preserved (or should be preserved by the caller). + Additionally, only the bottom 64 bits of each value stored in v8-v15 need to be preserved [8]; + it is the responsibility of the caller to preserve larger values. + +For SVE: +z0-z7 are used to pass scalable vector arguments to a subroutine, and to return scalable vector results from a function. + If a subroutine takes at least one argument in scalable vector registers or scalable predicate registers, + or returns results in such regisers, the subroutine must ensure that the entire contents of z8-z23 are preserved across the call. + In other cases it need only preserve the low 64 bits of z8-z15, as described in SIMD and Floating-Point registers. +p0-p3 are used to pass scalable predicate arguments to a subroutine and to return scalable predicate results from a function. + If a subroutine takes at least one argument in scalable vector registers or scalable predicate registers, + or returns results in such registers, the subroutine must ensure that p4-p15 are preserved across the call. + In other cases it need not preserve any scalable predicate register contents. + +*/ + +// x86 Register mapping +#define xRAX 10 +#define xRCX 11 +#define xRDX 12 +#define xRBX 13 +#define xRSP 14 +#define xRBP 15 +#define xRSI 16 +#define xRDI 17 +#define xR8 18 +#define xR9 19 +#define xR10 20 +#define xR11 21 +#define xR12 22 +#define xR13 23 +#define xR14 24 +#define xR15 25 +#define xFlags 26 +#define xRIP 27 +#define xSavedSP 28 + +// convert a x86 register to native according to the register mapping +#define TO_NAT(A) (xRAX + (A)) + +// 32bits version +#define wEAX xRAX +#define wECX xRCX +#define wEDX xRDX +#define wEBX xRBX +#define wESP xRSP +#define wEBP xRBP +#define wESI xRSI +#define wEDI xRDI +#define wR8 xR8 +#define wR9 xR9 +#define wR10 xR10 +#define wR11 xR11 +#define wR12 xR12 +#define wR13 xR13 +#define wR14 xR14 +#define wR15 xR15 +#define wFlags xFlags +// scratch registers +#define x1 1 +#define x2 2 +#define x3 3 +#define x4 4 +#define x5 5 +#define x6 6 +#define x87pc 7 +// x87 can be a scratch, but check if it's used as x87 PC and restore if needed in that case +// 32bits version of scratch +#define w1 x1 +#define w2 x2 +#define w3 x3 +#define w4 x4 +#define w5 x5 +#define w6 x6 +#define w87pc x87pc +// emu is r0 +#define xEmu 0 +// ARM64 LR +#define xLR 30 +// ARM64 SP is r31 but is a special register +#define xSP 31 +// xZR regs is 31 +#define xZR 31 +#define wZR xZR + +// conditions +// Z == 1 +#define cEQ 0b0000 +// Z != 1 +#define cNE 0b0001 +// C == 1 +#define cCS 0b0010 +// C == 1 +#define cHS cCS +// C != 1 +#define cCC 0b0011 +// C != 1 +#define cLO cCC +// N == 1 +#define cMI 0b0100 +// N != 1 +#define cPL 0b0101 +// V == 1 +#define cVS 0b0110 +// V != 1 +#define cVC 0b0111 +// C == 1 && Z == 0 +#define cHI 0b1000 +// C !=1 || Z == 1 +#define cLS 0b1001 +// N == V +#define cGE 0b1010 +// N != V +#define cLT 0b1011 +// N == V && Z == 0 +#define cGT 0b1100 +// N != V || Z == 1 +#define cLE 0b1101 +// always +#define c__ 0b1110 + +//FCMP type of opcode produce: +// if any NAN: CV / v1 == v2: ZC / v1 < v2: N / v1 > v2: C + +#endif //__ARM64_MAPPING_H__ \ No newline at end of file diff --git a/src/dynarec/la64/la64_emitter.h b/src/dynarec/la64/la64_emitter.h index 1bf7c79f..b94c3c88 100644 --- a/src/dynarec/la64/la64_emitter.h +++ b/src/dynarec/la64/la64_emitter.h @@ -4,130 +4,7 @@ LA64 Emitter */ -// LA64 ABI -/* -Name Alias Meaning saver ---------------------------------------------------------- -r0 zero Zero register - -r1 ra Return address Callee -r2 tp Thread pointer - -r3 sp Stack pointer Callee -r4-r5 a0-a1 Function arguments,Return val. Caller -r6-r11 a2-a7 Function arguments Caller -r12-r20 t0-t8 Temp registers Caller -r21 Reserved Non-allocatable - -r22 fp/s9 Frame pointer/Static register Callee -r23-31 s0-s8 Static registers Callee ---------------------------------------------------------- -f0-f1 fa0-fa1 Function arguments,Return val. Caller -f2-f7 fa2-fa7 Function arguments Caller -f8-f23 ft0-ft15 Temp registers Caller -f24-f31 fs0-fs7 Static registers Callee -*/ -/* - LA64 GPR mapping - There is no 15 registers free, so split the regs in 2 part - AX..DI : r12-r19 - R8..R15: r23-r30 - flags in r31 - ip in r20 -*/ -// x86 Register mapping -#define xRAX 12 -#define xRCX 13 -#define xRDX 14 -#define xRBX 15 -#define xRSP 16 -#define xRBP 17 -#define xRSI 18 -#define xRDI 19 -#define xR8 23 -#define xR9 24 -#define xR10 25 -#define xR11 26 -#define xR12 27 -#define xR13 28 -#define xR14 29 -#define xR15 30 -#define xFlags 31 -#define xRIP 20 -#define xSavedSP 22 - -// convert a x86 register to native according to the register mapping -#define TO_NAT(A) (xRAX + (A) + (((A) > 7) ? 3 : 0)) - -// scratch registers -#define x1 5 -#define x2 6 -#define x3 7 -#define x4 8 -#define x5 9 -#define x6 10 -#define x7 11 - -// emu is r0 -#define xEmu 4 -// LA64 RA -#define xRA 1 -#define ra xRA -// LA64 SP -#define xSP 3 -// RV64 args -#define A0 4 -#define A1 5 -#define A2 6 -#define A3 7 -#define A4 8 -#define A5 9 -#define A6 10 -#define A7 11 -// xZR regs -#define xZR 0 -#define wZR xZR -#define r0 xZR - -#define fcc0 0 -#define fcc1 1 -#define fcc2 2 -#define fcc3 3 -#define fcc4 4 -#define fcc5 5 -#define fcc6 6 -#define fcc7 7 - -#define cAF 0x0 -#define cUN 0x8 -#define cEQ 0x4 -#define cUEQ 0xC -#define cLT 0x2 -#define cULT 0xA -#define cLE 0x6 -#define cULE 0xE -#define cNE 0x10 -#define cOR 0x14 -#define cUNE 0x18 -#define sAF 0x1 -#define sUN 0x9 -#define sEQ 0x5 -#define sUEQ 0xD -#define sLT 0x3 -#define sULT 0xB -#define sLE 0x7 -#define sULE 0xF -#define sNE 0x11 -#define sOR 0x15 -#define sUNE 0x19 - -#define FCSR0 0 -#define FCSR1 1 -#define FCSR2 2 -#define FCSR3 3 - -#define FR_V 28 -#define FR_Z 27 -#define FR_O 26 -#define FR_U 25 -#define FR_I 24 +#include "la64_mapping.h" #define RM_RNE 0b0000000000 #define RM_RZ 0b0100000000 diff --git a/src/dynarec/la64/la64_mapping.h b/src/dynarec/la64/la64_mapping.h new file mode 100644 index 00000000..c373fe0c --- /dev/null +++ b/src/dynarec/la64/la64_mapping.h @@ -0,0 +1,130 @@ +#ifndef __LA64_MAPPING_H__ +#define __LA64_MAPPING_H__ + + +// LA64 ABI +/* +Name Alias Meaning saver +--------------------------------------------------------- +r0 zero Zero register - +r1 ra Return address Callee +r2 tp Thread pointer - +r3 sp Stack pointer Callee +r4-r5 a0-a1 Function arguments,Return val. Caller +r6-r11 a2-a7 Function arguments Caller +r12-r20 t0-t8 Temp registers Caller +r21 Reserved Non-allocatable - +r22 fp/s9 Frame pointer/Static register Callee +r23-31 s0-s8 Static registers Callee +--------------------------------------------------------- +f0-f1 fa0-fa1 Function arguments,Return val. Caller +f2-f7 fa2-fa7 Function arguments Caller +f8-f23 ft0-ft15 Temp registers Caller +f24-f31 fs0-fs7 Static registers Callee +*/ +/* + LA64 GPR mapping + There is no 15 registers free, so split the regs in 2 part + AX..DI : r12-r19 + R8..R15: r23-r30 + flags in r31 + ip in r20 +*/ +// x86 Register mapping +#define xRAX 12 +#define xRCX 13 +#define xRDX 14 +#define xRBX 15 +#define xRSP 16 +#define xRBP 17 +#define xRSI 18 +#define xRDI 19 +#define xR8 23 +#define xR9 24 +#define xR10 25 +#define xR11 26 +#define xR12 27 +#define xR13 28 +#define xR14 29 +#define xR15 30 +#define xFlags 31 +#define xRIP 20 +#define xSavedSP 22 + +// convert a x86 register to native according to the register mapping +#define TO_NAT(A) (xRAX + (A) + (((A) > 7) ? 3 : 0)) + +// scratch registers +#define x1 5 +#define x2 6 +#define x3 7 +#define x4 8 +#define x5 9 +#define x6 10 +#define x7 11 + +// emu is r0 +#define xEmu 4 +// LA64 RA +#define xRA 1 +#define ra xRA +// LA64 SP +#define xSP 3 +// RV64 args +#define A0 4 +#define A1 5 +#define A2 6 +#define A3 7 +#define A4 8 +#define A5 9 +#define A6 10 +#define A7 11 +// xZR regs +#define xZR 0 +#define wZR xZR +#define r0 xZR + +#define fcc0 0 +#define fcc1 1 +#define fcc2 2 +#define fcc3 3 +#define fcc4 4 +#define fcc5 5 +#define fcc6 6 +#define fcc7 7 + +#define cAF 0x0 +#define cUN 0x8 +#define cEQ 0x4 +#define cUEQ 0xC +#define cLT 0x2 +#define cULT 0xA +#define cLE 0x6 +#define cULE 0xE +#define cNE 0x10 +#define cOR 0x14 +#define cUNE 0x18 +#define sAF 0x1 +#define sUN 0x9 +#define sEQ 0x5 +#define sUEQ 0xD +#define sLT 0x3 +#define sULT 0xB +#define sLE 0x7 +#define sULE 0xF +#define sNE 0x11 +#define sOR 0x15 +#define sUNE 0x19 + +#define FCSR0 0 +#define FCSR1 1 +#define FCSR2 2 +#define FCSR3 3 + +#define FR_V 28 +#define FR_Z 27 +#define FR_O 26 +#define FR_U 25 +#define FR_I 24 + +#endif //__LA64_MAPPING_H__ \ No newline at end of file diff --git a/src/libtools/signal32.c b/src/libtools/signal32.c index 56c844ab..9399aba8 100644 --- a/src/libtools/signal32.c +++ b/src/libtools/signal32.c @@ -36,6 +36,18 @@ #include "dynablock.h" #include "../dynarec/dynablock_private.h" #include "dynarec_native.h" +#if defined(ARM64) +#include "dynarec/arm64/arm64_mapping.h" +#define CONTEXT_REG(P, X) P->uc_mcontext.regs[X] +#elif defined(LA64) +#include "dynarec/la64/la64_mapping.h" +#define CONTEXT_REG(P, X) P->uc_mcontext.__gregs[X] +#elif defined(RV64) +#include "dynarec/rv64/rv64_mapping.h" +#define CONTEXT_REG(P, X) P->uc_mcontext.__gregs[X] +#else +#error Unsupported Architecture +#endif //arch #endif @@ -481,36 +493,14 @@ void my_sigactionhandler_oldcode_32(x64emu_t* emu, int32_t sig, int simple, sigi emu = thread_get_emu(); uintptr_t frame = R_RSP; #if defined(DYNAREC) -#if defined(ARM64) dynablock_t* db = (dynablock_t*)cur_db;//FindDynablockFromNativeAddress(pc); ucontext_t *p = (ucontext_t *)ucntx; void* pc = NULL; if(p) { pc = (void*)p->uc_mcontext.pc; if(db) - frame = from_ptr((ptr_t)p->uc_mcontext.regs[10+_SP]); + frame = from_ptr((ptr_t)CONTEXT_REG(p, xRSP)); } -#elif defined(LA64) - dynablock_t* db = (dynablock_t*)cur_db;//FindDynablockFromNativeAddress(pc); - ucontext_t *p = (ucontext_t *)ucntx; - void* pc = NULL; - if(p) { - pc = (void*)p->uc_mcontext.__pc; - if(db) - frame = from_ptr((ptr_t)p->uc_mcontext.__gregs[12+_SP]); - } -#elif defined(RV64) - dynablock_t* db = (dynablock_t*)cur_db;//FindDynablockFromNativeAddress(pc); - ucontext_t *p = (ucontext_t *)ucntx; - void* pc = NULL; - if(p) { - pc = (void*)p->uc_mcontext.__gregs[0]; - if(db) - frame = from_ptr((ptr_t)p->uc_mcontext.__gregs[9]); - } -#else -#error Unsupported architecture -#endif #else (void)ucntx; (void)cur_db; void* pc = NULL; diff --git a/src/libtools/signals.c b/src/libtools/signals.c index 27226e1d..a6902cdb 100644 --- a/src/libtools/signals.c +++ b/src/libtools/signals.c @@ -41,6 +41,18 @@ #include "dynarec_native.h" #include "dynarec/dynarec_arch.h" #include "gdbjit.h" +#if defined(ARM64) +#include "dynarec/arm64/arm64_mapping.h" +#define CONTEXT_REG(P, X) P->uc_mcontext.regs[X] +#elif defined(LA64) +#include "dynarec/la64/la64_mapping.h" +#define CONTEXT_REG(P, X) P->uc_mcontext.__gregs[X] +#elif defined(RV64) +#include "dynarec/rv64/rv64_mapping.h" +#define CONTEXT_REG(P, X) P->uc_mcontext.__gregs[X] +#else +#error Unsupported Architecture +#endif //arch #endif #include "signal_private.h" @@ -266,21 +278,9 @@ EXPORT int my_sigaltstack(x64emu_t* emu, const x64_stack_t* ss, x64_stack_t* oss #ifdef DYNAREC x64emu_t* getEmuSignal(x64emu_t* emu, ucontext_t* p, dynablock_t* db) { -#if defined(ARM64) - if(db && p->uc_mcontext.regs[0]>0x10000) { - emu = (x64emu_t*)p->uc_mcontext.regs[0]; - } -#elif defined(LA64) - if(db && p->uc_mcontext.__gregs[4]>0x10000) { - emu = (x64emu_t*)p->uc_mcontext.__gregs[4]; - } -#elif defined(RV64) - if(db && p->uc_mcontext.__gregs[25]>0x10000) { - emu = (x64emu_t*)p->uc_mcontext.__gregs[25]; - } -#else -#error Unsupported Architecture -#endif //arch + if(db && p->uc_mcontext.regs[0]>0x10000) { + emu = (x64emu_t*)CONTEXT_REG(p, xEmu); + } return emu; } #endif @@ -342,66 +342,26 @@ void adjustregs(x64emu_t* emu) { void copyUCTXreg2Emu(x64emu_t* emu, ucontext_t* p, uintptr_t ip) { #ifdef DYNAREC -#ifdef ARM64 - emu->regs[_AX].q[0] = p->uc_mcontext.regs[10]; - emu->regs[_CX].q[0] = p->uc_mcontext.regs[11]; - emu->regs[_DX].q[0] = p->uc_mcontext.regs[12]; - emu->regs[_BX].q[0] = p->uc_mcontext.regs[13]; - emu->regs[_SP].q[0] = p->uc_mcontext.regs[14]; - emu->regs[_BP].q[0] = p->uc_mcontext.regs[15]; - emu->regs[_SI].q[0] = p->uc_mcontext.regs[16]; - emu->regs[_DI].q[0] = p->uc_mcontext.regs[17]; - emu->regs[_R8].q[0] = p->uc_mcontext.regs[18]; - emu->regs[_R9].q[0] = p->uc_mcontext.regs[19]; - emu->regs[_R10].q[0] = p->uc_mcontext.regs[20]; - emu->regs[_R11].q[0] = p->uc_mcontext.regs[21]; - emu->regs[_R12].q[0] = p->uc_mcontext.regs[22]; - emu->regs[_R13].q[0] = p->uc_mcontext.regs[23]; - emu->regs[_R14].q[0] = p->uc_mcontext.regs[24]; - emu->regs[_R15].q[0] = p->uc_mcontext.regs[25]; - emu->ip.q[0] = ip; - emu->eflags.x64 = p->uc_mcontext.regs[26]; -#elif defined(LA64) - emu->regs[_AX].q[0] = p->uc_mcontext.__gregs[12]; - emu->regs[_CX].q[0] = p->uc_mcontext.__gregs[13]; - emu->regs[_DX].q[0] = p->uc_mcontext.__gregs[14]; - emu->regs[_BX].q[0] = p->uc_mcontext.__gregs[15]; - emu->regs[_SP].q[0] = p->uc_mcontext.__gregs[16]; - emu->regs[_BP].q[0] = p->uc_mcontext.__gregs[17]; - emu->regs[_SI].q[0] = p->uc_mcontext.__gregs[18]; - emu->regs[_DI].q[0] = p->uc_mcontext.__gregs[19]; - emu->regs[_R8].q[0] = p->uc_mcontext.__gregs[23]; - emu->regs[_R9].q[0] = p->uc_mcontext.__gregs[24]; - emu->regs[_R10].q[0] = p->uc_mcontext.__gregs[25]; - emu->regs[_R11].q[0] = p->uc_mcontext.__gregs[26]; - emu->regs[_R12].q[0] = p->uc_mcontext.__gregs[27]; - emu->regs[_R13].q[0] = p->uc_mcontext.__gregs[28]; - emu->regs[_R14].q[0] = p->uc_mcontext.__gregs[29]; - emu->regs[_R15].q[0] = p->uc_mcontext.__gregs[30]; - emu->ip.q[0] = ip; - emu->eflags.x64 = p->uc_mcontext.__gregs[31]; -#elif defined(RV64) - emu->regs[_AX].q[0] = p->uc_mcontext.__gregs[16]; - emu->regs[_CX].q[0] = p->uc_mcontext.__gregs[13]; - emu->regs[_DX].q[0] = p->uc_mcontext.__gregs[12]; - emu->regs[_BX].q[0] = p->uc_mcontext.__gregs[24]; - emu->regs[_SP].q[0] = p->uc_mcontext.__gregs[9]; - emu->regs[_BP].q[0] = p->uc_mcontext.__gregs[8]; - emu->regs[_SI].q[0] = p->uc_mcontext.__gregs[11]; - emu->regs[_DI].q[0] = p->uc_mcontext.__gregs[10]; - emu->regs[_R8].q[0] = p->uc_mcontext.__gregs[14]; - emu->regs[_R9].q[0] = p->uc_mcontext.__gregs[15]; - emu->regs[_R10].q[0] = p->uc_mcontext.__gregs[26]; - emu->regs[_R11].q[0] = p->uc_mcontext.__gregs[27]; - emu->regs[_R12].q[0] = p->uc_mcontext.__gregs[18]; - emu->regs[_R13].q[0] = p->uc_mcontext.__gregs[19]; - emu->regs[_R14].q[0] = p->uc_mcontext.__gregs[20]; - emu->regs[_R15].q[0] = p->uc_mcontext.__gregs[21]; + #define GO(R) emu->regs[_##R].q[0] = CONTEXT_REG(p, x##R) + GO(RAX); + GO(RCX); + GO(RDX); + GO(RBX); + GO(RSP); + GO(RBP); + GO(RSI); + GO(RDI); + GO(R8); + GO(R9); + GO(R10); + GO(R11); + GO(R12); + GO(R13); + GO(R14); + GO(R15); + #undef GO emu->ip.q[0] = ip; - emu->eflags.x64 = p->uc_mcontext.__gregs[23]; -#else -#error Unsupported architecture -#endif + emu->eflags.x64 = p->uc_mcontext.regs[xFlags]; #endif } @@ -911,37 +871,15 @@ void my_sigactionhandler_oldcode_64(x64emu_t* emu, int32_t sig, int simple, sigi emu = thread_get_emu(); uintptr_t frame = R_RSP; #if defined(DYNAREC) -#if defined(ARM64) dynablock_t* db = (dynablock_t*)cur_db;//FindDynablockFromNativeAddress(pc); ucontext_t *p = (ucontext_t *)ucntx; void* pc = NULL; if(p) { pc = (void*)p->uc_mcontext.pc; if(db) - frame = (uintptr_t)p->uc_mcontext.regs[10+_SP]; - } -#elif defined(LA64) - dynablock_t* db = (dynablock_t*)cur_db;//FindDynablockFromNativeAddress(pc); - ucontext_t *p = (ucontext_t *)ucntx; - void* pc = NULL; - if(p) { - pc = (void*)p->uc_mcontext.__pc; - if(db) - frame = (uintptr_t)p->uc_mcontext.__gregs[12+_SP]; - } -#elif defined(RV64) - dynablock_t* db = (dynablock_t*)cur_db;//FindDynablockFromNativeAddress(pc); - ucontext_t *p = (ucontext_t *)ucntx; - void* pc = NULL; - if(p) { - pc = (void*)p->uc_mcontext.__gregs[0]; - if(db) - frame = (uintptr_t)p->uc_mcontext.__gregs[9]; + frame = (uintptr_t)p->uc_mcontext.regs[xRSP]; } #else -#error Unsupported architecture -#endif -#else (void)ucntx; (void)cur_db; void* pc = NULL; #endif @@ -1484,13 +1422,7 @@ void my_box64signalhandler(int32_t sig, siginfo_t* info, void * ucntx) if(is_callrets) { if(!type_callret) { // adjust x64pc for "ret" type - #ifdef __aarch64__ - x64pc = p->uc_mcontext.regs[27]; - #elif defined(LA64) - x64pc = p->uc_mcontext.__gregs[20]; - #elif defined(RV64) - x64pc = p->uc_mcontext.__gregs[22]; - #endif + x64pc = CONTEXT_REG(p, xRIP); } // check if block is still valid int is_hotpage = checkInHotPage(x64pc); @@ -1713,27 +1645,12 @@ dynarec_log(/*LOG_DEBUG*/LOG_INFO, "%04d|Repeated SIGSEGV with Access error on % const char* signame = (sig==SIGSEGV)?"SIGSEGV":((sig==SIGBUS)?"SIGBUS":((sig==SIGILL)?"SIGILL":"SIGABRT")); rsp = (void*)R_RSP; #if defined(DYNAREC) -#if defined(ARM64) - if(db) { - rsp = (void*)p->uc_mcontext.regs[10+_SP]; - } -#elif defined(LA64) - if(db && p->uc_mcontext.__gregs[4]>0x10000) { - emu = (x64emu_t*)p->uc_mcontext.__gregs[4]; + if(db && CONTEXT_REG(p, xEmu)>0x10000) { + emu = (x64emu_t*)CONTEXT_REG(p, xEmu); } if(db) { - rsp = (void*)p->uc_mcontext.__gregs[12+_SP]; - } -#elif defined(RV64) - if(db && p->uc_mcontext.__gregs[25]>0x10000) { - emu = (x64emu_t*)p->uc_mcontext.__gregs[25]; + rsp = (void*)CONTEXT_REG(p, xRSP); } - if(db) { - rsp = (void*)p->uc_mcontext.__gregs[9]; - } -#else -#error Unsupported Architecture -#endif //arch #endif //DYNAREC if(!db && (sig==SIGSEGV) && ((uintptr_t)addr==(x64pc-1))) x64pc--; @@ -1905,54 +1822,20 @@ dynarec_log(/*LOG_DEBUG*/LOG_INFO, "%04d|Repeated SIGSEGV with Access error on % getAddrFunctionName((uintptr_t)(db?db->x64_addr:0)), (db?getNeedTest((uintptr_t)db->x64_addr):0)?"needs_test":"clean", db?db->hash:0, hash, (void*)my_context->signals[sig]); -#if defined(ARM64) - if(db) { - shown_regs = 1; - for (int i=0; i<16; ++i) { - if(!(i%4)) printf_log_prefix(0, log_minimum, "\n"); - printf_log_prefix(0, log_minimum, "%s:0x%016llx ", reg_name[i], p->uc_mcontext.regs[10+i]); - } - printf_log_prefix(0, log_minimum, "\n"); - for (int i=0; i<6; ++i) - printf_log_prefix(0, log_minimum, "%s:0x%04x ", seg_name[i], emu->segs[i]); - } - if(rsp!=addr && getProtection((uintptr_t)rsp-4*8) && getProtection((uintptr_t)rsp+4*8)) - for (int i=-4; i<4; ++i) { - printf_log_prefix(0, log_minimum, "%sRSP%c0x%02x:0x%016lx", (i%4)?" ":"\n", i<0?'-':'+', abs(i)*8, *(uintptr_t*)(rsp+i*8)); - } -#elif defined(RV64) - if(db) { - shown_regs = 1; - for (int i=0; i<16; ++i) { - if(!(i%4)) printf_log_prefix(0, log_minimum, "\n"); - printf_log_prefix(0, log_minimum, "%s:0x%016llx ", reg_name[i], p->uc_mcontext.__gregs[(((uint8_t[]) { 16, 13, 12, 24, 9, 8, 11, 10, 14, 15, 26, 27, 18, 19, 20, 21 })[i])]); - } - printf_log_prefix(0, log_minimum, "\n"); - for (int i=0; i<6; ++i) - printf_log_prefix(0, log_minimum, "%s:0x%04x ", seg_name[i], emu->segs[i]); - } - if(rsp!=addr && getProtection((uintptr_t)rsp-4*8) && getProtection((uintptr_t)rsp+4*8)) - for (int i=-4; i<4; ++i) { - printf_log_prefix(0, log_minimum, "%sRSP%c0x%02x:0x%016lx", (i%4)?" ":"\n", i<0?'-':'+', abs(i)*8, *(uintptr_t*)(rsp+i*8)); - } -#elif defined(LA64) - if(db) { - shown_regs = 1; - for (int i=0; i<16; ++i) { - if(!(i%4)) printf_log_prefix(0, log_minimum, "\n"); - printf_log_prefix(0, log_minimum, "%s:0x%016llx ", reg_name[i], p->uc_mcontext.__gregs[12+i]); - } - printf_log_prefix(0, log_minimum, "\n"); - for (int i=0; i<6; ++i) - printf_log_prefix(0, log_minimum, "%s:0x%04x ", seg_name[i], emu->segs[i]); - } - if(rsp!=addr && getProtection((uintptr_t)rsp-4*8) && getProtection((uintptr_t)rsp+4*8)) - for (int i=-4; i<4; ++i) { - printf_log_prefix(0, log_minimum, "%sRSP%c0x%02x:0x%016lx", (i%4)?" ":"\n", i<0?'-':'+', abs(i)*8, *(uintptr_t*)(rsp+i*8)); + if(db) { + shown_regs = 1; + for (int i=0; i<16; ++i) { + if(!(i%4)) printf_log_prefix(0, log_minimum, "\n"); + printf_log_prefix(0, log_minimum, "%s:0x%016llx ", reg_name[i], CONTEXT_REG(p, TO_NAT(i))); + } + printf_log_prefix(0, log_minimum, "\n"); + for (int i=0; i<6; ++i) + printf_log_prefix(0, log_minimum, "%s:0x%04x ", seg_name[i], emu->segs[i]); } -#else - #warning TODO -#endif + if(rsp!=addr && getProtection((uintptr_t)rsp-4*8) && getProtection((uintptr_t)rsp+4*8)) + for (int i=-4; i<4; ++i) { + printf_log_prefix(0, log_minimum, "%sRSP%c0x%02x:0x%016lx", (i%4)?" ":"\n", i<0?'-':'+', abs(i)*8, *(uintptr_t*)(rsp+i*8)); + } #else printf_log(log_minimum, "%04d|%s @%p (%s) (x64pc=%p/\"%s\", rsp=%p), for accessing %p (code=%d)", GetTID(), signame, pc, name, (void*)x64pc, x64name?:"???", rsp, addr, info->si_code); #endif |