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Diffstat (limited to 'src/dynarec/arm64/dynarec_arm64_f30f.c')
-rw-r--r--src/dynarec/arm64/dynarec_arm64_f30f.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_f30f.c b/src/dynarec/arm64/dynarec_arm64_f30f.c
index 2531a8d6..19d054e3 100644
--- a/src/dynarec/arm64/dynarec_arm64_f30f.c
+++ b/src/dynarec/arm64/dynarec_arm64_f30f.c
@@ -119,12 +119,12 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             nextop = F8;

             GETGD;

             GETEXSS(d0, 0, 0);

-            if(!BOX64ENV(dynarec_fastround) && !arm64_frintts) {

+            if(!BOX64ENV(dynarec_fastround) && !cpuext.frintts) {

                 MRS_fpsr(x5);

                 BFCw(x5, FPSR_IOC, 1);   // reset IOC bit

                 MSR_fpsr(x5);

             }

-            if(!BOX64ENV(dynarec_fastround) && arm64_frintts) {

+            if(!BOX64ENV(dynarec_fastround) && cpuext.frintts) {

                 v0 = fpu_get_scratch(dyn, ninst);

                 if(rex.w) {

                     FRINT64ZS(v0, d0);

@@ -135,7 +135,7 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             } else {

                 FCVTZSxwS(gd, d0);

             }

-            if(!BOX64ENV(dynarec_fastround) && !arm64_frintts) {

+            if(!BOX64ENV(dynarec_fastround) && !cpuext.frintts) {

                 MRS_fpsr(x5);   // get back FPSR to check the IOC bit

                 TBZ_NEXT(x5, FPSR_IOC);

                 if(rex.w) {

@@ -150,14 +150,14 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             nextop = F8;

             GETGD;

             GETEXSS(q0, 0, 0);

-            if(!BOX64ENV(dynarec_fastround) && !arm64_frintts) {

+            if(!BOX64ENV(dynarec_fastround) && !cpuext.frintts) {

                 MRS_fpsr(x5);

                 BFCw(x5, FPSR_IOC, 1);   // reset IOC bit

                 MSR_fpsr(x5);

             }

             u8 = sse_setround(dyn, ninst, x1, x2, x3);

             d1 = fpu_get_scratch(dyn, ninst);

-            if(!BOX64ENV(dynarec_fastround) && arm64_frintts) {

+            if(!BOX64ENV(dynarec_fastround) && cpuext.frintts) {

                 if(rex.w) {

                     FRINT64XS(d1, q0);

                 } else {

@@ -168,7 +168,7 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             }

             x87_restoreround(dyn, ninst, u8);

             FCVTZSxwS(gd, d1);

-            if(!BOX64ENV(dynarec_fastround) && !arm64_frintts) {

+            if(!BOX64ENV(dynarec_fastround) && !cpuext.frintts) {

                 MRS_fpsr(x5);   // get back FPSR to check the IOC bit

                 TBZ_NEXT(x5, FPSR_IOC);

                 if(rex.w) {

@@ -322,7 +322,7 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
             if(BOX64ENV(dynarec_fastround)) {

                 VFCVTZSQS(v0, v1);

             } else {

-                if(arm64_frintts) {

+                if(cpuext.frintts) {

                     VFRINT32ZSQ(v0, v1);

                     VFCVTZSQS(v0, v0);

                 } else {