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-rw-r--r--src/dynarec/arm64/dynarec_arm64_avx_66_0f38.c179
-rw-r--r--src/dynarec/dynarec_native_functions.c93
-rw-r--r--src/dynarec/dynarec_native_functions.h5
3 files changed, 256 insertions, 21 deletions
diff --git a/src/dynarec/arm64/dynarec_arm64_avx_66_0f38.c b/src/dynarec/arm64/dynarec_arm64_avx_66_0f38.c
index e77eca69..afebb155 100644
--- a/src/dynarec/arm64/dynarec_arm64_avx_66_0f38.c
+++ b/src/dynarec/arm64/dynarec_arm64_avx_66_0f38.c
@@ -60,6 +60,22 @@ uintptr_t dynarec64_AVX_66_0F38(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip
     rex_t rex = vex.rex;
 
     switch(opcode) {
+        case 0x00:
+            INST_NAME("VPSHUFB Gx, Vx, Ex");
+            nextop = F8;
+            d0 = fpu_get_scratch(dyn, ninst);
+            for(int l=0; l<1+vex.l; ++l) {
+                if(!l) {
+                    GETGX_empty_VXEX(v0, v2, v1, 0);
+                } else {
+                    GETGY_empty_VYEY(v0, v2, v1);
+                }
+                MOVIQ_8(d0, 0b10001111);
+                VANDQ(d0, d0, v1);  // mask the index
+                VTBLQ1_8(v0, v2, d0);
+            }
+            if(!vex.l) YMM0(gd);
+            break;
 
         case 0x18:
             INST_NAME("VBROADCASTSS Gx, Ex");
@@ -147,6 +163,169 @@ uintptr_t dynarec64_AVX_66_0F38(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip
             }
             break;
 
+        case 0xDC:
+            INST_NAME("VAESENC Gx, Vx, Ex");  // AES-NI
+            nextop = F8;
+            if(arm64_aes) {
+                d0 = fpu_get_scratch(dyn, ninst);  // ARM64 internal operation differs a bit from x86_64
+                for(int l=0; l<1+vex.l; ++l) {
+                    if(!l) {GETGX_empty_VXEX(v0, v2, v1, 0);} else {GETGY_empty_VYEY(v0, v2, v1);}
+                    VEORQ(d0, v2, v1);
+                    AESE(d0, v1);
+                    AESMC(d0, d0);
+                    VEORQ(v0, d0, v1);
+                }
+            } else {
+                GETGX_empty_VXEX(q0, q2, q1, 0);
+                if(MODREG && (gd==(nextop&7)+(rex.b<<3))) {
+                    d0 = fpu_get_scratch(dyn, ninst);
+                    if(vex.l)
+                        d1 = fpu_get_scratch(dyn, ninst);
+                } else d0 = -1;
+                if(vex.l) { GETGY_empty_VYEY(v0, v2, v1); }
+                if(d0!=-1) {
+                    VMOVQ(d0, q1);
+                    if(vex.l) VMOVQ(d1, v1);
+                }
+                if(gd!=vex.v) {
+                    VMOVQ(q0, q2);
+                    if(vex.l) VMOVQ(v0, v2);
+                }
+                sse_forget_reg(dyn, ninst, gd);
+                MOV32w(x1, gd);
+                CALL(native_aese, -1);
+                if(vex.l) {MOV32w(x1, gd); CALL(native_aese_y, -1);}
+                GETGX(q0, 1);
+                VEORQ(q0, q0, (d0==-1)?q1:d0);
+                if(vex.l) {
+                    GETGY_empty(v0, (d0==-1)?(nextop&7)+(rex.b<<3):-1, -1, -1);
+                    VEORQ(v0, v0, (d0==-1)?v1:d0);
+                } else YMM0(gd);
+            }
+            if(!vex.l) YMM0(gd);
+            break;
+        case 0xDD:
+            INST_NAME("VAESENCLAST Gx, Vx, Ex");  // AES-NI
+            nextop = F8;
+            if(arm64_aes) {
+                d0 = fpu_get_scratch(dyn, ninst);  // ARM64 internal operation differs a bit from x86_64
+                for(int l=0; l<1+vex.l; ++l) {
+                    if(!l) { GETGX_empty_VXEX(v0, v2, v1, 0); } else { GETGY_empty_VYEY(v0, v2, v1); }
+                    VEORQ(d0, v2, v1);
+                    AESE(d0, v1);
+                    VEORQ(v0, d0, v1);
+                }
+            } else {
+                GETGX_empty_VXEX(q0, q2, q1, 0);
+                if(MODREG && (gd==(nextop&7)+(rex.b<<3))) {
+                    d0 = fpu_get_scratch(dyn, ninst);
+                    if(vex.l)
+                        d1 = fpu_get_scratch(dyn, ninst);
+                } else d0 = -1;
+                if(vex.l) { GETGY_empty_VYEY(v0, v2, v1); }
+                if(d0!=-1) {
+                    VMOVQ(d0, q1);
+                    if(vex.l) VMOVQ(d1, v1);
+                }
+                if(gd!=vex.v) {
+                    VMOVQ(q0, q2);
+                    if(vex.l) VMOVQ(v0, v2);
+                }
+                sse_forget_reg(dyn, ninst, gd);
+                MOV32w(x1, gd);
+                CALL(native_aeselast, -1);
+                if(vex.l) {MOV32w(x1, gd); CALL(native_aeselast_y, -1);}
+                GETGX(q0, 1);
+                VEORQ(q0, q0, (d0==-1)?q1:d0);
+                if(vex.l) {
+                    GETGY_empty(v0, (d0==-1)?(nextop&7)+(rex.b<<3):-1, -1, -1);
+                    VEORQ(v0, v0, (d0==-1)?v1:d0);
+                } else YMM0(gd);
+            }
+            if(!vex.l) YMM0(gd);
+            break;
+        case 0xDE:
+            INST_NAME("VAESDEC Gx, Vx, Ex");  // AES-NI
+            nextop = F8;
+            if(arm64_aes) {
+                d0 = fpu_get_scratch(dyn, ninst);  // ARM64 internal operation differs a bit from x86_64
+                for(int l=0; l<1+vex.l; ++l) {
+                    if(!l) {GETGX_empty_VXEX(v0, v2, v1, 0);} else {GETGY_empty_VYEY(v0, v2, v1);}
+                    VEORQ(d0, v2, v1);
+                    AESD(d0, v1);
+                    AESIMC(d0, d0);
+                    VEORQ(v0, d0, v1);
+                }
+            } else {
+                GETGX_empty_VXEX(q0, q2, q1, 0);
+                if(MODREG && (gd==(nextop&7)+(rex.b<<3))) {
+                    d0 = fpu_get_scratch(dyn, ninst);
+                    if(vex.l)
+                        d1 = fpu_get_scratch(dyn, ninst);
+                } else d0 = -1;
+                if(vex.l) { GETGY_empty_VYEY(v0, v2, v1); }
+                if(d0!=-1) {
+                    VMOVQ(d0, q1);
+                    if(vex.l) VMOVQ(d1, v1);
+                }
+                if(gd!=vex.v) {
+                    VMOVQ(q0, q2);
+                    if(vex.l) VMOVQ(v0, v2);
+                }
+                sse_forget_reg(dyn, ninst, gd);
+                MOV32w(x1, gd);
+                CALL(native_aesd, -1);
+                if(vex.l) {MOV32w(x1, gd); CALL(native_aesd_y, -1);}
+                GETGX(q0, 1);
+                VEORQ(q0, q0, (d0==-1)?q1:d0);
+                if(vex.l) {
+                    GETGY_empty(v0, (d0==-1)?(nextop&7)+(rex.b<<3):-1, -1, -1);
+                    VEORQ(v0, v0, (d0==-1)?v1:d0);
+                } else YMM0(gd);
+            }
+            if(!vex.l) YMM0(gd);
+            break;
+        case 0xDF:
+            INST_NAME("VAESDECLAST Gx, Vx, Ex");  // AES-NI
+            nextop = F8;
+            if(arm64_aes) {
+                d0 = fpu_get_scratch(dyn, ninst);  // ARM64 internal operation differs a bit from x86_64
+                for(int l=0; l<1+vex.l; ++l) {
+                    if(!l) {GETGX_empty_VXEX(v0, v2, v1, 0);} else {GETGY_empty_VYEY(v0, v2, v1);}
+                    VEORQ(d0, v2, v1);
+                    AESD(d0, v1);
+                    VEORQ(v0, d0, v1);
+                }
+            } else {
+                GETGX_empty_VXEX(q0, q2, q1, 0);
+                if(MODREG && (gd==(nextop&7)+(rex.b<<3))) {
+                    d0 = fpu_get_scratch(dyn, ninst);
+                    if(vex.l)
+                        d1 = fpu_get_scratch(dyn, ninst);
+                } else d0 = -1;
+                if(vex.l) { GETGY_empty_VYEY(v0, v2, v1); }
+                if(d0!=-1) {
+                    VMOVQ(d0, q1);
+                    if(vex.l) VMOVQ(d1, v1);
+                }
+                if(gd!=vex.v) {
+                    VMOVQ(q0, q2);
+                    if(vex.l) VMOVQ(v0, v2);
+                }
+                sse_forget_reg(dyn, ninst, gd);
+                MOV32w(x1, gd);
+                CALL(native_aesdlast, -1);
+                if(vex.l) {MOV32w(x1, gd); CALL(native_aesdlast_y, -1);}
+                GETGX(q0, 1);
+                VEORQ(q0, q0, (d0==-1)?q1:d0);
+                if(vex.l) {
+                    GETGY_empty(v0, (d0==-1)?(nextop&7)+(rex.b<<3):-1, -1, -1);
+                    VEORQ(v0, v0, (d0==-1)?v1:d0);
+                } else YMM0(gd);
+            }
+            if(!vex.l) YMM0(gd);
+            break;
+
         default:
             DEFAULT;
     }
diff --git a/src/dynarec/dynarec_native_functions.c b/src/dynarec/dynarec_native_functions.c
index e0e0f3ff..c97d041d 100644
--- a/src/dynarec/dynarec_native_functions.c
+++ b/src/dynarec/dynarec_native_functions.c
@@ -298,6 +298,17 @@ void native_aesimc(x64emu_t* emu, int xmm)
         emu->xmm[xmm].ub[3+j*4] = ff_mult(0x0B, eax1.ub[0+j*4]) ^ ff_mult(0x0D, eax1.ub[1+j*4]) ^ ff_mult(0x09, eax1.ub[2+j*4]) ^ ff_mult(0x0E, eax1.ub[3+j*4]);
     }
 }
+void native_aesimc_y(x64emu_t* emu, int ymm)
+{
+    sse_regs_t eay1 = emu->ymm[ymm];
+
+    for(int j=0; j<4; ++j) {
+        emu->ymm[ymm].ub[0+j*4] = ff_mult(0x0E, eay1.ub[0+j*4]) ^ ff_mult(0x0B, eay1.ub[1+j*4]) ^ ff_mult(0x0D, eay1.ub[2+j*4]) ^ ff_mult(0x09, eay1.ub[3+j*4]);
+        emu->ymm[ymm].ub[1+j*4] = ff_mult(0x09, eay1.ub[0+j*4]) ^ ff_mult(0x0E, eay1.ub[1+j*4]) ^ ff_mult(0x0B, eay1.ub[2+j*4]) ^ ff_mult(0x0D, eay1.ub[3+j*4]);
+        emu->ymm[ymm].ub[2+j*4] = ff_mult(0x0D, eay1.ub[0+j*4]) ^ ff_mult(0x09, eay1.ub[1+j*4]) ^ ff_mult(0x0E, eay1.ub[2+j*4]) ^ ff_mult(0x0B, eay1.ub[3+j*4]);
+        emu->ymm[ymm].ub[3+j*4] = ff_mult(0x0B, eay1.ub[0+j*4]) ^ ff_mult(0x0D, eay1.ub[1+j*4]) ^ ff_mult(0x09, eay1.ub[2+j*4]) ^ ff_mult(0x0E, eay1.ub[3+j*4]);
+    }
+}
 void native_aesmc(x64emu_t* emu, int xmm)
 {
     sse_regs_t eax1 = emu->xmm[xmm];
@@ -309,29 +320,40 @@ void native_aesmc(x64emu_t* emu, int xmm)
         emu->xmm[xmm].ub[3+j*4] = ff_mult(0x03, eax1.ub[0+j*4]) ^               eax1.ub[1+j*4]  ^               eax1.ub[2+j*4]  ^ ff_mult(0x02, eax1.ub[3+j*4]);
     }
 }
+void native_aesmc_y(x64emu_t* emu, int ymm)
+{
+    sse_regs_t eay1 = emu->ymm[ymm];
+
+    for(int j=0; j<4; ++j) {
+        emu->ymm[ymm].ub[0+j*4] = ff_mult(0x02, eay1.ub[0+j*4]) ^ ff_mult(0x03, eay1.ub[1+j*4]) ^               eay1.ub[2+j*4]  ^               eay1.ub[3+j*4] ;
+        emu->ymm[ymm].ub[1+j*4] =               eay1.ub[0+j*4]  ^ ff_mult(0x02, eay1.ub[1+j*4]) ^ ff_mult(0x03, eay1.ub[2+j*4]) ^               eay1.ub[3+j*4] ;
+        emu->ymm[ymm].ub[2+j*4] =               eay1.ub[0+j*4]  ^               eay1.ub[1+j*4]  ^ ff_mult(0x02, eay1.ub[2+j*4]) ^ ff_mult(0x03, eay1.ub[3+j*4]);
+        emu->ymm[ymm].ub[3+j*4] = ff_mult(0x03, eay1.ub[0+j*4]) ^               eay1.ub[1+j*4]  ^               eay1.ub[2+j*4]  ^ ff_mult(0x02, eay1.ub[3+j*4]);
+    }
+}
+                                  //   A0 B1 C2 D3 E4 F5 G6 H7 I8 J9 Ka Lb Mc Nd Oe Pf
+                                  //   A  N  K  H  E  B  O  L  I  F  C  P  M  J  G  D
+static const uint8_t invshiftrows[] = {0,13,10, 7, 4, 1,14,11, 8, 5, 2,15,12, 9, 6, 3};
+static const uint8_t invsubbytes[256] = {
+    0x52, 0x09, 0x6a, 0xd5, 0x30, 0x36, 0xa5, 0x38, 0xbf, 0x40, 0xa3, 0x9e, 0x81, 0xf3, 0xd7, 0xfb,
+    0x7c, 0xe3, 0x39, 0x82, 0x9b, 0x2f, 0xff, 0x87, 0x34, 0x8e, 0x43, 0x44, 0xc4, 0xde, 0xe9, 0xcb,
+    0x54, 0x7b, 0x94, 0x32, 0xa6, 0xc2, 0x23, 0x3d, 0xee, 0x4c, 0x95, 0x0b, 0x42, 0xfa, 0xc3, 0x4e,
+    0x08, 0x2e, 0xa1, 0x66, 0x28, 0xd9, 0x24, 0xb2, 0x76, 0x5b, 0xa2, 0x49, 0x6d, 0x8b, 0xd1, 0x25,
+    0x72, 0xf8, 0xf6, 0x64, 0x86, 0x68, 0x98, 0x16, 0xd4, 0xa4, 0x5c, 0xcc, 0x5d, 0x65, 0xb6, 0x92,
+    0x6c, 0x70, 0x48, 0x50, 0xfd, 0xed, 0xb9, 0xda, 0x5e, 0x15, 0x46, 0x57, 0xa7, 0x8d, 0x9d, 0x84,
+    0x90, 0xd8, 0xab, 0x00, 0x8c, 0xbc, 0xd3, 0x0a, 0xf7, 0xe4, 0x58, 0x05, 0xb8, 0xb3, 0x45, 0x06,
+    0xd0, 0x2c, 0x1e, 0x8f, 0xca, 0x3f, 0x0f, 0x02, 0xc1, 0xaf, 0xbd, 0x03, 0x01, 0x13, 0x8a, 0x6b,
+    0x3a, 0x91, 0x11, 0x41, 0x4f, 0x67, 0xdc, 0xea, 0x97, 0xf2, 0xcf, 0xce, 0xf0, 0xb4, 0xe6, 0x73,
+    0x96, 0xac, 0x74, 0x22, 0xe7, 0xad, 0x35, 0x85, 0xe2, 0xf9, 0x37, 0xe8, 0x1c, 0x75, 0xdf, 0x6e,
+    0x47, 0xf1, 0x1a, 0x71, 0x1d, 0x29, 0xc5, 0x89, 0x6f, 0xb7, 0x62, 0x0e, 0xaa, 0x18, 0xbe, 0x1b,
+    0xfc, 0x56, 0x3e, 0x4b, 0xc6, 0xd2, 0x79, 0x20, 0x9a, 0xdb, 0xc0, 0xfe, 0x78, 0xcd, 0x5a, 0xf4,
+    0x1f, 0xdd, 0xa8, 0x33, 0x88, 0x07, 0xc7, 0x31, 0xb1, 0x12, 0x10, 0x59, 0x27, 0x80, 0xec, 0x5f,
+    0x60, 0x51, 0x7f, 0xa9, 0x19, 0xb5, 0x4a, 0x0d, 0x2d, 0xe5, 0x7a, 0x9f, 0x93, 0xc9, 0x9c, 0xef,
+    0xa0, 0xe0, 0x3b, 0x4d, 0xae, 0x2a, 0xf5, 0xb0, 0xc8, 0xeb, 0xbb, 0x3c, 0x83, 0x53, 0x99, 0x61,
+    0x17, 0x2b, 0x04, 0x7e, 0xba, 0x77, 0xd6, 0x26, 0xe1, 0x69, 0x14, 0x63, 0x55, 0x21, 0x0c, 0x7d,
+};
 void native_aesdlast(x64emu_t* emu, int xmm)
 {
-                            //   A0 B1 C2 D3 E4 F5 G6 H7 I8 J9 Ka Lb Mc Nd Oe Pf
-                            //   A  N  K  H  E  B  O  L  I  F  C  P  M  J  G  D
-    const uint8_t invshiftrows[] = {0,13,10, 7, 4, 1,14,11, 8, 5, 2,15,12, 9, 6, 3};
-    const uint8_t invsubbytes[256] = {
-        0x52, 0x09, 0x6a, 0xd5, 0x30, 0x36, 0xa5, 0x38, 0xbf, 0x40, 0xa3, 0x9e, 0x81, 0xf3, 0xd7, 0xfb,
-        0x7c, 0xe3, 0x39, 0x82, 0x9b, 0x2f, 0xff, 0x87, 0x34, 0x8e, 0x43, 0x44, 0xc4, 0xde, 0xe9, 0xcb,
-        0x54, 0x7b, 0x94, 0x32, 0xa6, 0xc2, 0x23, 0x3d, 0xee, 0x4c, 0x95, 0x0b, 0x42, 0xfa, 0xc3, 0x4e,
-        0x08, 0x2e, 0xa1, 0x66, 0x28, 0xd9, 0x24, 0xb2, 0x76, 0x5b, 0xa2, 0x49, 0x6d, 0x8b, 0xd1, 0x25,
-        0x72, 0xf8, 0xf6, 0x64, 0x86, 0x68, 0x98, 0x16, 0xd4, 0xa4, 0x5c, 0xcc, 0x5d, 0x65, 0xb6, 0x92,
-        0x6c, 0x70, 0x48, 0x50, 0xfd, 0xed, 0xb9, 0xda, 0x5e, 0x15, 0x46, 0x57, 0xa7, 0x8d, 0x9d, 0x84,
-        0x90, 0xd8, 0xab, 0x00, 0x8c, 0xbc, 0xd3, 0x0a, 0xf7, 0xe4, 0x58, 0x05, 0xb8, 0xb3, 0x45, 0x06,
-        0xd0, 0x2c, 0x1e, 0x8f, 0xca, 0x3f, 0x0f, 0x02, 0xc1, 0xaf, 0xbd, 0x03, 0x01, 0x13, 0x8a, 0x6b,
-        0x3a, 0x91, 0x11, 0x41, 0x4f, 0x67, 0xdc, 0xea, 0x97, 0xf2, 0xcf, 0xce, 0xf0, 0xb4, 0xe6, 0x73,
-        0x96, 0xac, 0x74, 0x22, 0xe7, 0xad, 0x35, 0x85, 0xe2, 0xf9, 0x37, 0xe8, 0x1c, 0x75, 0xdf, 0x6e,
-        0x47, 0xf1, 0x1a, 0x71, 0x1d, 0x29, 0xc5, 0x89, 0x6f, 0xb7, 0x62, 0x0e, 0xaa, 0x18, 0xbe, 0x1b,
-        0xfc, 0x56, 0x3e, 0x4b, 0xc6, 0xd2, 0x79, 0x20, 0x9a, 0xdb, 0xc0, 0xfe, 0x78, 0xcd, 0x5a, 0xf4,
-        0x1f, 0xdd, 0xa8, 0x33, 0x88, 0x07, 0xc7, 0x31, 0xb1, 0x12, 0x10, 0x59, 0x27, 0x80, 0xec, 0x5f,
-        0x60, 0x51, 0x7f, 0xa9, 0x19, 0xb5, 0x4a, 0x0d, 0x2d, 0xe5, 0x7a, 0x9f, 0x93, 0xc9, 0x9c, 0xef,
-        0xa0, 0xe0, 0x3b, 0x4d, 0xae, 0x2a, 0xf5, 0xb0, 0xc8, 0xeb, 0xbb, 0x3c, 0x83, 0x53, 0x99, 0x61,
-        0x17, 0x2b, 0x04, 0x7e, 0xba, 0x77, 0xd6, 0x26, 0xe1, 0x69, 0x14, 0x63, 0x55, 0x21, 0x0c, 0x7d,
-    };
 
     sse_regs_t eax1;
     for(int i=0; i<16; ++i)
@@ -341,6 +363,17 @@ void native_aesdlast(x64emu_t* emu, int xmm)
         emu->xmm[xmm].ub[i] = invsubbytes[eax1.ub[i]];
 
 }
+void native_aesdlast_y(x64emu_t* emu, int ymm)
+{
+
+    sse_regs_t eay1;
+    for(int i=0; i<16; ++i)
+        eay1.ub[i] = emu->ymm[ymm].ub[invshiftrows[i]];
+    //STATE ← InvSubBytes( STATE );
+    for(int i=0; i<16; ++i)
+        emu->ymm[ymm].ub[i] = invsubbytes[eay1.ub[i]];
+
+}
 static const uint8_t shiftrows[] = {0, 5,10,15, 4, 9,14, 3, 8,13, 2, 7,12, 1, 6,11};
 static const uint8_t subbytes[256] = {
     0x63, 0x7c, 0x77, 0x7b, 0xf2, 0x6b, 0x6f, 0xc5, 0x30, 0x01, 0x67, 0x2b, 0xfe, 0xd7, 0xab, 0x76,
@@ -371,16 +404,34 @@ void native_aeselast(x64emu_t* emu, int xmm)
     for(int i=0; i<16; ++i)
         emu->xmm[xmm].ub[i] = subbytes[eax1.ub[i]];
 }
+void native_aeselast_y(x64emu_t* emu, int ymm)
+{
+    sse_regs_t eay1;
+    for(int i=0; i<16; ++i)
+        eay1.ub[i] = emu->ymm[ymm].ub[shiftrows[i]];
+    for(int i=0; i<16; ++i)
+        emu->ymm[ymm].ub[i] = subbytes[eay1.ub[i]];
+}
 void native_aesd(x64emu_t* emu, int xmm)
 {
     native_aesdlast(emu, xmm);
     native_aesimc(emu, xmm);
 }
+void native_aesd_y(x64emu_t* emu, int ymm)
+{
+    native_aesdlast_y(emu, ymm);
+    native_aesimc_y(emu, ymm);
+}
 void native_aese(x64emu_t* emu, int xmm)
 {
     native_aeselast(emu, xmm);
     native_aesmc(emu, xmm);
 }
+void native_aese_y(x64emu_t* emu, int ymm)
+{
+    native_aeselast_y(emu, ymm);
+    native_aesmc_y(emu, ymm);
+}
 void native_aeskeygenassist(x64emu_t* emu, int gx, int ex, void* p, uint32_t u8)
 {
     sse_regs_t *EX = p?((sse_regs_t*)p):&emu->xmm[ex];
diff --git a/src/dynarec/dynarec_native_functions.h b/src/dynarec/dynarec_native_functions.h
index 5085e9e1..1072a201 100644
--- a/src/dynarec/dynarec_native_functions.h
+++ b/src/dynarec/dynarec_native_functions.h
@@ -36,10 +36,15 @@ void native_frstor16(x64emu_t* emu, uint8_t* ed);
 void native_fprem1(x64emu_t* emu);
 
 void native_aesd(x64emu_t* emu, int xmm);
+void native_aesd_y(x64emu_t* emu, int ymm);
 void native_aese(x64emu_t* emu, int xmm);
+void native_aese_y(x64emu_t* emu, int ymm);
 void native_aesdlast(x64emu_t* emu, int xmm);
+void native_aesdlast_y(x64emu_t* emu, int ymm);
 void native_aeselast(x64emu_t* emu, int xmm);
+void native_aeselast_y(x64emu_t* emu, int ymm);
 void native_aesimc(x64emu_t* emu, int xmm);
+void native_aesimc_y(x64emu_t* emu, int ymm);
 void native_aeskeygenassist(x64emu_t* emu, int gx, int ex, void* p, uint32_t u8);
 void native_pclmul(x64emu_t* emu, int gx, int ex, void* p, uint32_t u8);
 void native_pclmul_x(x64emu_t* emu, int gx, int vx, void* p, uint32_t u8);