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* [ARM64_DYNAREC] Added AVX.66.0F38 18 and AVX.66.0F3A 0C opcodesptitSeb2024-05-306-0/+151
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* [ARM64_DYNAREC] Added AVX.0F 57 opcodeptitSeb2024-05-302-0/+37
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* [ARM64_DYNAREC] Added AVX.66.0F3A 18 opcodeptitSeb2024-05-306-2/+100
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* [ARM64_DYNAREC] That first avx opcode now is 256bits enabledptitSeb2024-05-3026-313/+582
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* [RV64_DYNAREC] Added more MMX opcodes and some optimizations too (#1539)xctan2024-05-303-60/+306
| | | | | | | | | | | | | | | | | | | | | | | | | | | * [RV64_DYNAREC] Added 0F DF PANDN opcode * [RV64_DYNAREC] Added 0F E0 PAVGB opcode * [RV64_DYNAREC] Added 0F E3 PAVGW opcode * [RV64_DYNAREC] Added 0F 74 PCMPEQB opcode * [RV64_DYNAREC] Added 0F 76 PCMPEQD opcode * [RV64_DYNAREC] Added 0F 64 PCMPGTB opcode * [RV64_DYNAREC] Added 0F 66 PCMPGTD opcode and optimized 66 0F 66 PCMPGTD opcode * [RV64_DYNAREC] Added 0F 65 PCMPGTW opcode * [RV64_DYNAREC] Added 0F C5 PEXTRW opcode * [RV64_DYNAREC] Added 0F 38 02 PHADDD opcode * [RV64_DYNAREC] Optimized packed saturate add/sub * [RV64_DYNAREC] Added 0F 38 03 PHADDSW opcode * [RV64_DYNAREC] Added 0F 38 01 PHADDW opcode
* Wrapped libssh2 (#1538)LiZhuoheng2024-05-3010-0/+90
| | | | | * Wrapped libssh2 * Add more libssh2 wrapped functions
* [ARM64_DYNAREC] Added a fisrt 128bits only AVX opcodeptitSeb2024-05-3021-22/+362
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* Added more MMX opcodes and some optimizations too (#1537)xctan2024-05-302-22/+110
| | | | | | | * [RV64_DYNAREC] Added 0F DD PADDUSW opcode and optimized 66 0F DD PADDUSW opcode * [RV64_DYNAREC] Added 0F 3A 0F PALIGNR opcode * [RV64_DYNAREC] Optimized 66 0F 3A 0F PALIGNR opcode
* [INTERPRETER] Last batch of avx/avx2 opcodeptitSeb2024-05-296-13/+451
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* [INTERPRETER] Added more avx/avx2 opcodes, and fixed vpxorptitSeb2024-05-295-111/+821
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* [INTERPRETER] Moar avx/avx2 opcodesptitSeb2024-05-293-13/+599
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* [INTERPRETER] yet more avx/avx2 opcodesptitSeb2024-05-294-7/+555
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* Added one xslt wrapped constant (for #1534)ptitSeb2024-05-296-3/+33
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* Added a few libc wrapped function (for #1517 and #1531)ptitSeb2024-05-294-2/+9
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* [INTERPRETER] and a bit more avx/avx2 opcodesptitSeb2024-05-282-0/+108
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* [INTERPRETER] still more avx/avx2 opcodesptitSeb2024-05-282-5/+203
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* [INTERPRETER] more and more avx/avx2 opcodesptitSeb2024-05-286-11/+321
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* [INTERPRETER] Even more avx/avx2 opcodes, all the mov and moreptitSeb2024-05-287-6/+428
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* [INTERPRETER] Even more avx/avx2 opcodes, and a fix for android buildsptitSeb2024-05-286-4/+285
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* [RV64_DYNAREC] Added more MMX opcodes and some optimizations too (#1535)xctan2024-05-284-21/+187
| | | | | | | | | | | | | | | | | | | * [RV64_DYNAREC] Added 0F F7 MASKMOVQ opcode * [RV64_DYNAREC] Added 0F 38 1C PABSB opcode * [RV64_DYNAREC] Added 0F 38 1E PABSD opcode * [RV64_DYNAREC] Added 0F 38 1D PABSW opcode * [RV64_DYNAREC] Added 0F 63 PACKSSWB opcode * [RV64_DYNAREC] Added 0F FC PADDB opcode * [RV64_DYNAREC] Added 0F D4 PADDQ opcode * [RV64_DYNAREC] Added 0F EC PADDSB opcode and optimized 66 0F EC PADDSB opcode * [RV64_DYNAREC] Added 0F DC PADDUSB opcode and optimized 66 0F DC PADDUSB opcode
* [INTERPRETER] More avx/avx2 opcodesptitSeb2024-05-286-6/+532
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* [INTERPRETER] More avx, avx2 and vaes opcodesptitSeb2024-05-2810-46/+1069
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* Fixed cpuid leaf d, component 2 (fixes wine 9.6+ not booting)ptitSeb2024-05-271-14/+0
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* Fixed a warningptitSeb2024-05-271-1/+1
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* Correct hadnlign of upper 32bits value of mask for xsave/xrstorptitSeb2024-05-271-2/+4
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* [ARM64_DYNAREC] Added faked 0F C7 /4 opcode to get bigger dynablockptitSeb2024-05-271-1/+6
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* [INTERPRETER] Added more avx opcodesptitSeb2024-05-275-3/+227
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* [ARM64_DYNAREC] Fixed some SHA1 opcode when source is same as destptitSeb2024-05-271-5/+6
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* [ARM64_DYNAREC] Some fixes to opcode when src is same as destptitSeb2024-05-271-2/+8
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* [INTERPRETER] Some fixes when opcode use with same reg as src and destptitSeb2024-05-272-0/+12
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* [ARM64_DYNAREC] Fixed some pcmp[ei]stri flagsptitSeb2024-05-271-7/+8
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* Just clear AF flags on pcmp[i/e]stri helperptitSeb2024-05-271-1/+2
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* [INTERPRETER] Added some more avx opcodesptitSeb2024-05-273-0/+86
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* More avx infrastructureptitSeb2024-05-275-3/+24
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* [INTERPRETER] Some fixes and small refactor on avx handlingptitSeb2024-05-273-111/+163
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* [INTERPRETER] Added avx (66 0F 38) 00 opcodeptitSeb2024-05-275-2/+104
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* [INTERPRETER] Added avx (66 0F 3A) 0F opcodeptitSeb2024-05-271-0/+32
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* [INTERPRETER] Added avx (F3 0F) 7F opcodeptitSeb2024-05-271-6/+16
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* [INTERPRETER] Added avx (66 0F 3A) 44 opcodeptitSeb2024-05-278-14/+183
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* Small cleanup in my_cpuidptitSeb2024-05-271-1/+1
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* [INTERPRETER] Added avx (66 0F) 6F ocpodeptitSeb2024-05-271-0/+16
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* [INTERPRETER] Added avx (66 0F) 6C/6D opcode and even more fixes to some avx ↵ptitSeb2024-05-261-22/+58
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* [INTERPRETER] Added avx (66 0F) DB opcode and more fixes to some avx opcodesptitSeb2024-05-261-10/+28
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* [INTERPRETER] Added avx (66 0F) EB opcode and fixed other avx opcodesptitSeb2024-05-262-38/+72
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* [INTERPRETER] Added avx (66 0F) 64/65/66/72/73/EF opcodesptitSeb2024-05-261-2/+173
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* [INTERPRETER] Added avx (F3 0F) 6F and (66 0F) 70ptitSeb2024-05-269-18/+266
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* Added 67 66 83 opcodes ([ARM64_DYNAREC] too)ptitSeb2024-05-263-0/+119
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* Fixed xrstor helperptitSeb2024-05-261-1/+1
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* [INTERPRETER] my first avx opcodeptitSeb2024-05-2611-19/+198
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* Fix typo on box64 config file (#1533)Yip Coekjan2024-05-251-1/+1
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