about summary refs log tree commit diff stats
Commit message (Expand)AuthorAgeFilesLines
...
* [DYNAREC] Fixed a potential issue where defered flags are not computed/reset ...ptitSeb2025-07-024-4/+5
* [TRACE] Fixed the jump from instruction idx for Extend blcok in traceptitSeb2025-07-021-1/+1
* Simplified a bit ROLLING_LOG buffer handlingptitSeb2025-07-015-23/+15
* [ARM64_DYNAREC] Optimized propate XMM/YMM unused helpersptitSeb2025-07-011-26/+11
* [ARM64_DYNAREC] Fixed a regression introduced with 4903177bab1f3324a0faeedd96...ptitSeb2025-06-301-1/+1
* [DYNAREC] Refactor hotpage detection and dynarec_dirty 1 & 2. Also adjust som...ptitSeb2025-06-308-52/+256
* [ARM64_DYNAREC] Added 66 8D opcodeptitSeb2025-06-291-1/+16
* [ARM64_DYNAREC] Added 67 9C opcodeptitSeb2025-06-291-0/+6
* [ARM64_DYNAREC] Made (V)M(IN/AX)P(D/S) opcodes always exact, it's inexpensive...ptitSeb2025-06-293-38/+16
* [INTERP] Added 67 9C opcode (for LEGO2Kdrive)ptitSeb2025-06-281-0/+6
* [INTERP] Small imrpvoment for 0F 03 opcodeptitSeb2025-06-281-1/+1
* [INTERP] Added 0F 03 opcode (for LEGO2Kdrive)ptitSeb2025-06-281-0/+14
* [ARM64_DYNAREC] Use Unaligned sepcial handling to handle rare case of 32bits ...ptitSeb2025-06-281-4/+21
* [LA64_DYNAREC] Removed some TABLE64 usage (#2782)Yang Liu2025-06-271-21/+12
* [LA64_DYNAREC] Add la64 avx load/store ops part 4. (#2775)phorcys2025-06-271-0/+252
* [LA64_DYNAREC] Optimized GETIP macro (#2781)Yang Liu2025-06-276-51/+49
* [LA64_DYNAREC] Removed some redundant macro definitions (#2778)Yang Liu2025-06-261-2/+0
* [DYNACACHE][LA64] More work on internal reloc (#2779)Yang Liu2025-06-265-13/+23
* [LA64_DYNAREC] Add la64 avx load/store ops part 3. (#2774)phorcys2025-06-266-10/+416
* [LA64_DYNAREC] Add la64 avx load/store ops part 2. (#2773)phorcys2025-06-262-0/+113
* [ARM64_DYNAREC] Fixed opcode name for VDIVPDptitSeb2025-06-251-1/+1
* [ARM64_DYNAREC] Fixed some extended instance of VCMPSD opcodesptitSeb2025-06-251-3/+3
* [INTERP] Improved 32bits to 16bits float conversionptitSeb2025-06-251-6/+21
* [INTERP] More work on UD flagsptitSeb2025-06-251-5/+17
* [INTERP] More work on UD flagsptitSeb2025-06-251-6/+11
* [ARM64_DYNAREC] Adjusted some UD flags in BLSMSK opcodeptitSeb2025-06-251-4/+14
* [INTERP] Adjusted some UD flags in BLSMSK opcodeptitSeb2025-06-251-4/+18
* [ARM64_DYNAREC] Fixed CF flag of BLSI opcodeptitSeb2025-06-251-1/+1
* [INTERP] Fixed CF flag of BLSI opcodeptitSeb2025-06-251-1/+1
* [ARM64_DYNAREC] Fixed BEXTR opcodeptitSeb2025-06-251-11/+13
* [INTERP] Added 66 F0 F7 /2 opcode (aligned only)ptitSeb2025-06-242-1/+36
* [ARM64_DYNAREC] Improved BTx opcodes (and fixed one BTC opcode)ptitSeb2025-06-241-41/+141
* [INTERP] Added F0 BB and improved F0 BA /7 opcodesptitSeb2025-06-241-9/+94
* [DYNAREC] Better check of limit for a dynablockptitSeb2025-06-242-2/+2
* [WRAPPER] additional wrapped symbols (#2765)airidosas2522025-06-242-0/+16
* [LA64_DYNAREC] Add la64 avx load/store ops part 1. (#2766)phorcys2025-06-245-12/+194
* [ARM64_DYNAREC] Improved handling of last_ipptitSeb2025-06-245-2/+5
* [DYNACACHE][LA64] Added const table for later use in internal relocation (#2770)Yang Liu2025-06-2413-69/+318
* [LA64_DYNAREC] This should help certain builds (for #2769)ptitSeb2025-06-242-5/+10
* [CI] Upgraded QEMU and loongarch64 toolchains (#2768)Yang Liu2025-06-241-4/+6
* [DYNAREC] Removed some unused code (#2767)Yang Liu2025-06-246-26/+0
* [LA64_DYNAREC]Add basic avx support for la64. (#2745)phorcys2025-06-2316-70/+5585
* Fix wowbox64 buildptitSeb2025-06-231-0/+12
* [DYNACACHE] Added support for unaligned addressesptitSeb2025-06-232-4/+49
* [ARM64_DYNAREC] Removed commented codeptitSeb2025-06-231-1/+0
* Add `map64_customMalloc` (#2764)Chi-Kuan Chiu2025-06-231-6/+140
* [DYNAREC] Refactored a bit BARRIER_FLOAT ([ARM64] olny for now, todo for RV64...ptitSeb2025-06-2316-42/+118
* [ARM64_DYNAREC] Small fix in arch_buildptitSeb2025-06-221-1/+1
* [DYNACACHE] Introduced B64X_DYNACACHE=2 to use cache but not create new ones,...ptitSeb2025-06-205-15/+19
* [DYNACACHE] Fixed a WarningptitSeb2025-06-201-1/+1