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2023-03-16[RV64_DYNAREC] Optimize MOV64 emitter (#572)Yang Liu4-41/+49
2023-03-16[RV64_DYNAREC] Added F3 0F 1E NOP opcode (#570)Yang Liu4-4/+77
2023-03-15[RV64_PRINTER] Added C2/RETN and C3/RET opocde, along with fixes to jmp_to_nextptitSeb3-15/+151
2023-03-15[RV64_DYNAREC] A few more fixes to the printerptitSeb1-1/+3
2023-03-15[RV64_DYNAREC] Update rv64_printer with new reg allocationptitSeb1-2/+2
2023-03-15[RV64_DYNAREC] Added CC (and NativeCall) opcode, and shuffle around some xFla...ptitSeb6-24/+84
2023-03-15[RV64_DYNAREC] Implemented a solutionfor the problematic F_OF flag (use F_OF2...ptitSeb6-6/+68
2023-03-15[RV64_DYNAREC] Added E8 CALL opcode, and fixed some issue with many macrosptitSeb6-19/+329
2023-03-15[RV64_DYNAREC] Added 80 /7 CMP opcode (#567)Yang Liu4-11/+120
2023-03-15[RV64_DYNAREC] Added C6 MOV opcode (#566)Yang Liu1-0/+39
2023-03-15[RV64_DYNAREC] Added 39 CMP opcode and some fixes (#565)Yang Liu4-55/+119
2023-03-14Added 66 0F 38 29 PCMPEQQ opcde ([ARM64_DYNAREC] too) (for #558)ptitSeb2-0/+16
2023-03-14[RV64_DYNAREC] Added {81,83} /0 ADD opcode (#564)xctan4-1/+110
2023-03-14[RV64_DYNAREC] Added 85 TEST opcode (#563)Yang Liu4-3/+64
2023-03-14[RV64_DYNAREC] Added C1 /7 SAR opcode (#559)xctan5-5/+108
2023-03-14[RV64_DYNAREC] Small optimization for 31 XOR opcode (#561)Yang Liu1-6/+11
2023-03-14[RV64_DYNAREC] Added 31 XOR opcode (#560)Yang Liu5-19/+89
2023-03-13[ARM64_DYNAREC] Small optim when putting 0 in a memory locationptitSeb1-6/+14
2023-03-13[ARM64_DYNAREC] Use STUR/LDUR when possible, plus some other small improvmentsptitSeb22-463/+590
2023-03-13[ARM64_DYNAREC] Optimised double push/pop with stp/ldp opcodeptitSeb3-11/+70
2023-03-13[ARM64_DYNAREC] Removed child leftover, it's not implemented anymoreptitSeb4-26/+0
2023-03-13[RV64_DYNAREC] Removed child leftover, it's not implemented anymoreptitSeb4-19/+0
2023-03-13[RV64_DYNAREC] Some small optim to getedptitSeb1-11/+34
2023-03-13[RV64_DYNAREC] Fixed scratch register conflict for SUB (#556)Yang Liu3-3/+6
2023-03-13[RV64_DYNAREC] Added 1 more scratch register (it was already saved/restored)ptitSeb1-0/+1
2023-03-13[RV64_DYNAREC] Fixed rv64_epilog_fast, but it's not used for nowptitSeb1-6/+13
2023-03-13[RV64_DYNAREC] Added 8B MOV opcode (#555)xctan2-0/+15
2023-03-13[DYNAREC] Fixed missing X_PEND need at end of block for unimplemented opcodeptitSeb1-1/+13
2023-03-13[ARM64_DYNAREC] Added unimplemented handling of CRC32 opcode (to avoid stoppi...ptitSeb1-0/+36
2023-03-13[RV64_DYNAREC] Added (81/83) SUB opcode (#554)Yang Liu3-42/+108
2023-03-13[RV64_DYNAREC] Added 29 SUB opcode (#553)Yang Liu6-20/+173
2023-03-12Tried to optimize TLS fetchingptitSeb4-18/+20
2023-03-12Cleanup mutex wrappingptitSeb4-70/+6
2023-03-12[DYNAREC] Fix some potential issue in the next jump handlingptitSeb1-5/+7
2023-03-12[ARM64_DYNAREC] Added 66 0F 3A 0A opcodeptitSeb1-1/+19
2023-03-12[ARM64_DYNAREC] Added (F2/F3) A7 opcodeptitSeb1-1/+39
2023-03-12Expose POPCNT capability tooptitSeb2-1/+2
2023-03-12[ARM64_DYNAREC] Added 66 0F 3A 0E opcodeptitSeb1-0/+36
2023-03-12[ARM64_DYNAREC] Added F4 opcodeptitSeb1-0/+11
2023-03-12Added support for SSE4.1, and added a couple of opcode ([ARM64_DYNAREC] too)ptitSeb5-2/+47
2023-03-12[ARM64_DYNAREC] Fixed buildptitSeb4-1/+32
2023-03-12[DYNAREC] Some renaming for the sake of consistancyptitSeb7-26/+12
2023-03-12Rv64 dynarec (#550)ptitSeb35-56/+3680
2023-03-11[DYNAREC] Small optim for 66 0F 6D opcodeptitSeb1-1/+3
2023-03-11[DYNAREC] Soma need FASTROUND disabled for it's physics engineptitSeb2-0/+7
2023-03-11Start of new dev. cycleptitSeb1-1/+1
2023-03-10add -dnogit=1 flag to debian rulesRyan Fortner2-1/+2
2023-03-10Bumped to v0.2.2ptitSeb3-1/+56
2023-03-09Added 2 more wrapped function to libgnutls (for #210)ptitSeb1-2/+5
2023-03-09Added libresolv to libc for glibc2.34+ (might help #210)ptitSeb1-1/+2