about summary refs log tree commit diff stats
path: root/src/dynarec/dynarec_arch.h (follow)
Commit message (Expand)AuthorAgeFilesLines
* [LA64_DYNAREC] Added x87 support (#3078)Yang Liu2025-10-191-2/+0
* [ARM64_DYNAREC] Introduced a dynarec version of the UpdateFlags helper functionptitSeb2025-08-301-0/+2
* [DYNAREC] Rearranged arch-specific AVX infra code (#2930)Yang Liu2025-08-131-1/+1
* [DYNAREC] Refactored a bit BARRIER_FLOAT ([ARM64] olny for now, todo for RV64...ptitSeb2025-06-231-1/+1
* [DYNACACHE] More work on dynache relocationptitSeb2025-06-151-0/+2
* [DYNACACHE] Refactored cpu extension, will be used in dynacache signature checksptitSeb2025-06-141-1/+1
* [ARM64_DYNAREC] Try to avoid Load/Unload of XMM/YMM regs when possible on int...ptitSeb2025-05-221-1/+3
* [ARM64_DYNAREC] Allow bigger block to be builtptitSeb2025-04-251-2/+4
* [RV64_DYNAREC] Added X87DOUBLE=2 support (#2553)Yang Liu2025-04-211-1/+3
* [DYNAREC] Introduce BOX64_DYNAREC_X87DOUBLE=2 to handle Low Precision x87 ([A...ptitSeb2025-04-161-0/+1
* [DYNAREC] Better handling of self-loop and added CALLRET=2 settings (ARM64 on...ptitSeb2025-04-091-0/+3
* [ARM64] Use crc32 hardware support (if available) for dynablock signatureptitSeb2025-03-311-0/+2
* [LA64_DYNAREC] This should fix the buildptitSeb2025-03-091-1/+1
* [ARM64_DYNAREC] Improced arch_build helpers function to only compute build st...ptitSeb2025-03-081-3/+3
* [RV64_DYNAREC] Added codegen for unaligned stores (#2289)xctan2025-01-241-3/+4
* [ARM64_DYNAREC] Better handling unaligned access to device memory, with reger...ptitSeb2025-01-111-0/+3
* [DYNAREC] Imroved log on signal and flags/sse info gathering. [ARM64_DYNAREC]...ptitSeb2025-01-051-0/+3
* [ARM64_DYNAREC] Improved signal handling and flags handling (tbd on other archs)ptitSeb2024-12-311-0/+12
* [LA64_DYNAREC] Added nativeflags support (#2202)Yang Liu2024-12-241-1/+1
* [COSIM] Try to get more stable result on x87 stacks by unwinding status befor...ptitSeb2024-12-111-0/+3
* [RV64_DYNAREC] Added simple opcodes fusion as "native flags" (#2102)Yang Liu2024-12-021-1/+4
* [ARM64_DYNAREC] Added directmapping of x86 flags to N, V and Z arm64 flagsptitSeb2024-10-171-2/+13
* [RV64_DYNAREC] Fixed more issues in the vector infrastructure (#1755)Yang Liu2024-08-251-1/+1
* [RV64_DYNAREC] Added vector SEW cache (#1698)Yang Liu2024-07-191-4/+6
* [ARM64_DYNAREC] Reworked ymm0 propagationptitSeb2024-07-071-3/+0
* [ARM64_DYNAREC] More improvment on YMM handlingptitSeb2024-07-051-0/+3
* [LA64_DYNAREC] Fixed dynarec infra (#1479)Yang Liu2024-05-011-6/+7
* [LA64_DYNAREC] Added 70-7F Jcc opcodes, refine printer and some fixes too (#1...Yang Liu2024-03-021-0/+1
* [LONGAARCH] Renamed arch to LA64, as LA464 is code name for 3a5000, so that w...ptitSeb2024-02-281-6/+6
* [DYNAREC] Tests for emited coded size limit (usefull for DYNAREC_TEST for exa...ptitSeb2024-02-071-0/+6
* remove executable bitsJohannes Schauer Marin Rodrigues2023-07-211-0/+0
* [RV64_DYNAREC] Added x87/SSE/mmx infrastructure, and a few x87 D9 opcodesptitSeb2023-03-211-2/+4
* [DYNAREC] Grouped common function in dynarec_native_functions.cptitSeb2023-03-161-9/+21
* Rv64 dynarec (#550)ptitSeb2023-03-121-0/+9
* [DYNAREC] Still more multiarch changesptitSeb2022-02-271-0/+9
* [DYNAREC] Even more work on multiarchptitSeb2022-02-271-10/+1
* [DYNAREC] More work on multi-archptitSeb2022-02-271-1/+2
* [DYNAREC] Refactored dynarec to ease the future adding of new target architec...ptitSeb2022-02-271-0/+24