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* [INTERP] Refactored how 64/65/66/67 and F2/F3 prefixes are handled, removing ...ptitSeb2025-08-221-29/+12
* [INTERP] Added 64/65 AVX.0F 10/11 opcodes (for #2808)ptitSeb2025-07-121-0/+2
* [INTERP] Added 64/65 67 89/8B 64bits opcodesptitSeb2025-05-281-0/+2
* [WOW64] Added non-functional PE build (#2532)Yang Liu2025-04-141-10/+1
* [WOW64] More tweaks towards PE build (#2519)Yang Liu2025-04-101-0/+1
* Moved more functions to os.h (#2497)Yang Liu2025-04-031-6/+0
* Introduced box64cpu.h for exported interpreter and dynarec functions (#2490)Yang Liu2025-04-011-74/+0
* Improved Signal handling ([ARM4_DYNAREC] too)ptitSeb2024-11-181-0/+2
* Added 64/65 D8..D9 opcodesptitSeb2024-11-071-4/+6
* Added preliminary Box32 support (#1760)ptitSeb2024-08-261-0/+21
* [COSIM] Added more helpers to avoid segfault on rare casesptitSeb2024-06-031-1/+1
* [COSIM] Fixed YMM handling in cosim, seems to work better nowptitSeb2024-06-021-0/+1
* [INTERPRETER] Added BMI1, BMI2 and ADX extensionsptitSeb2024-05-311-7/+18
* [INTERPRETER] Added avx (66 0F 38) 00 opcodeptitSeb2024-05-271-1/+3
* [INTERPRETER] Added avx (66 0F 3A) 44 opcodeptitSeb2024-05-271-1/+4
* [INTERPRETER] Added avx (F3 0F) 6F and (66 0F) 70ptitSeb2024-05-261-0/+7
* [INTERPRETER] my first avx opcodeptitSeb2024-05-261-0/+19
* [INTERPRETER] Added 67 64 8F opcodes, and fixed 67 64 89/8B opcodesptitSeb2024-03-081-0/+2
* [DYNAREC_TEST] Have a proper TestEw that only copy/tests 2 bytes instead of 4ptitSeb2024-02-071-1/+1
* [INTERPRETER] Added 67 66 8D opcode ([ARM64_DYNAREC] too)ptitSeb2024-01-061-0/+1
* Added 66 0F F2 38 F1 opcode, and fixed all 66 0F F2/F3 xx opcodes (should hel...ptitSeb2023-11-041-0/+4
* Merge pull request #896 from josch/exeptitSeb2023-07-211-0/+0
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| * remove executable bitsJohannes Schauer Marin Rodrigues2023-07-211-0/+0
* | [32BITS] Added 64 67 8B opcode (for #870)ptitSeb2023-07-161-0/+2
* | A few Push/Pop fixes and cleanups (#878)Alexandre Julliard2023-07-031-9/+36
* | [32BITS] Separate RUn67 32bits from 64bits version, as they are too differentsptitSeb2023-06-221-0/+2
* | Added some support for 32bits code (doesn't seems enough for wow64 yet)ptitSeb2023-06-181-9/+12
* | Added ability to trace and dump 32bits codeptitSeb2023-06-171-1/+1
* | Added support for creating 32bits selector (no 32bits execution yet)ptitSeb2023-06-171-0/+1
* | Optimized Exit bridge managmentptitSeb2023-05-101-0/+7
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* [DYNAREC] Some fine-tunning to cosimptitSeb2023-04-011-2/+2
* [DYNAREC] More improvement to TEST_DYNARECptitSeb2023-03-311-0/+1
* [DYNAREC] Cleaned up the TEST_INTERPRETER a bitptitSeb2023-03-281-0/+4
* [DYNAREC] Added BOX64_DYNAREC_TEST to run interpeter and dynarec at the same ...ptitSeb2023-03-271-1/+45
* Various small fixes on InterpretorptitSeb2023-02-161-1/+1
* [DYNAREC] Improved BOX64_NODYNAREC effect, and Interpretor->Dynarec on condit...ptitSeb2022-09-251-2/+2
* Chenged Interpretor so RIP is updated on opcode success (better precision for...ptitSeb2022-08-061-82/+44
* Added 67 0F 67/7F ocpodes ([DYNAREC] too) (for The Last Federation)ptitSeb2021-10-241-0/+1
* Added suport for arch_prctl syscall, and GL segment handling ([DYNAREC] too)ptitSeb2021-06-071-1/+1
* Added 66 F0 83 opcodeptitSeb2021-04-241-0/+1
* First passrajdakin2021-04-141-7/+1
* Added 67 0F 2E/2F opcodesptitSeb2021-04-131-0/+1
* Added 67 66 0F 6F/7A opcodesptitSeb2021-04-081-1/+5
* Added some more 67 opcodes (may need to find a better solution for this)ptitSeb2021-04-041-0/+1
* Added 64 66 0F D6 and 64 0F 29 opcodesptitSeb2021-03-261-0/+1
* Added DE opcodesptitSeb2021-03-261-0/+1
* Added DC opcodesptitSeb2021-03-261-0/+1
* Fixed some warning with modrm on 67 32bits prefixptitSeb2021-03-121-1/+1
* Added a large number of CPU opcodesptitSeb2021-03-121-1/+3
* Added more x87 opcodesptitSeb2021-03-111-0/+3