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2025-04-29[INTERP] Fixed some more instruction name commentsptitSeb1-2/+2
2025-04-28[WRAPPERHELPER] Fixed 02423c2 (#2584)rajdakin1-2/+1
2025-04-28[RV64_DYNAREC] Minor optim to 8 bit TEST opcode (#2583)Yang Liu3-13/+18
2025-04-28[RV64_DYNAREC] Small optimization to LEA opcode (#2582)Yang Liu3-8/+9
2025-04-28[ARM64_DYNAREC] Mostly cosmetic changes to SSE/AVX packed shift opcodesptitSeb2-43/+37
2025-04-28[INTERP] Fixes and improvments to SSE/AVX packed shift opcodesptitSeb3-84/+40
2025-04-28[RV64_DYNAREC] Optimized rv64 printer for pseudo and jump instructions (#2581)Yang Liu1-7/+55
2025-04-28Show Dynarec architecture in version string (#2580)Yang Liu3-34/+43
2025-04-28[RV64_DYNAREC] Minor adjustment to dynarec_missing=2 (#2578)Yang Liu3-4/+4
2025-04-27[ARM64_DYNAREC] Small optim for PSIGN[B/W/D] opcodesptitSeb2-33/+27
2025-04-27[ARM64_DYNAREC] Some work on UD flags on (66) F3 0F BC/BD opcodesptitSeb2-16/+64
2025-04-27[ARM64_DYNAREC] More work on UD flags for (66) F3 0F BC/BD opcodesptitSeb2-4/+60
2025-04-27[ARM64_DYNAREC] Minor fox to F6 /7 opcodeptitSeb1-1/+1
2025-04-27[INTERP] More work on UD flagsptitSeb5-13/+65
2025-04-27[INTERP] Fixed some potential issue with LOCK ADC/SBB on Dynarec buildptitSeb1-15/+23
2025-04-27[INTERP] Added 66 F3 0F BC opcodeptitSeb1-0/+33
2025-04-27[WRAPPER] Reworked libssh2 wrapping, to make it more completeptitSeb7-7/+418
2025-04-27[WRAPPERHELPER] Fixed a small issue with the parserptitSeb1-1/+1
2025-04-27[ELFLOADER] Fixed an issue were fail to load a library might endup unloading ...ptitSeb1-6/+0
2025-04-27[ELFLOADER] Added lib loading/unloading logs to DLSYM_ERRORptitSeb2-6/+13
2025-04-27[RCFILE] Fixed BOX64_ROLLING_LOG not being a boolean but an integer valueptitSeb1-1/+1
2025-04-26[ARM64_DYNAREC] Refactored (V)PSHUFD opcodesptitSeb2-111/+183
2025-04-26[INTERP] Cosmetic change to VPSHUFD opocdeptitSeb1-1/+1
2025-04-26[WRAPPER] Fixed some potential sagfault on my_backtrace wrapped functionptitSeb1-0/+6
2025-04-26[ARM64_DYNAREC] Allow shift with saturation on (V)PMULH(U)W because it will n...ptitSeb3-10/+5
2025-04-26[ARM64_DYNAREC] Small fix for edge cases on (V)PMULHUW opcodesptitSeb3-8/+10
2025-04-26[WRAPPER] Added some missing function to wrapped libgio-2 (for #2575)ptitSeb7-2/+34
2025-04-25[ARM64_DYNAREC] Fixed (rarely used) some edge case for (V)PMULHRSW opcode (an...ptitSeb11-7/+84
2025-04-25[ARM64_DYNAREC] Small optim on some 256bits VPMOV[S/Z]X* opcodesptitSeb1-22/+14
2025-04-25[ARM64_DYNAREC] Allow bigger block to be builtptitSeb2-3/+5
2025-04-25[ARM64_DYNAREC] Minor change, (V)PMOVMSKB is only valid on register, not memoryptitSeb2-39/+47
2025-04-25[INTERP] Another fix for a opcode name in commentptitSeb1-1/+1
2025-04-25[INTERP] Fixed a small issue where VPCMP[E/I]STRM would not wipe upper 128bit...ptitSeb1-2/+2
2025-04-25[ARM64_DYNAREC] Fixed a potential issue with PCMPEQQ opcodes, and many missin...ptitSeb1-63/+63
2025-04-24[ARM64_DYNAREC] Improved and fixed software fallback for (V)PCLMULQDQ opcodesptitSeb2-37/+24
2025-04-24[ARM64_DYNAREC] Some optimisation to some (V)(P)BLEND* opcodesptitSeb2-63/+21
2025-04-24[INTERP] Yet another opcode name comment fixptitSeb1-1/+1
2025-04-24[SIGNAL] Better signal logging when trace enabled (#2572)Yang Liu1-2/+11
2025-04-24[RV64_DYNAREC] Fixed x87 cache swapping (#2571)Yang Liu2-9/+11
2025-04-24[ARM64_DYNAREC] Small optim on (V)PACKUSDW opcodesptitSeb2-14/+4
2025-04-24[LA64_DYNAREC] Add/Opt more mmx/sse ops (#2565)phorcys2-46/+180
2025-04-24[INTERP] Cosmetic change to 0F 1C..1E opcodesptitSeb1-3/+3
2025-04-24[INTERP] Added nan handling on AVX.F3.0F 59 opcodeptitSeb1-0/+2
2025-04-24[ARM64_DYNAREC] Simplified code for MOVS[H/L]DUP opcodesptitSeb2-19/+3
2025-04-24[INTERP] Fixed another opcode name commentptitSeb1-1/+1
2025-04-24[LA64_DYNAREC] Add POPCNT/TZCNT/LZCNT ops. (#2566)phorcys6-8/+171
2025-04-24[ARM64_DYNAREC] Small iùprovments to some (V)MOVQ opcodesptitSeb4-11/+12
2025-04-24[INTERP] Fixed a commentptitSeb1-1/+1
2025-04-24[ARM64_DYNAREC] Small change and optims to various (V)MOVNT* opcodesptitSeb4-33/+24
2025-04-24[INTERP] Small change to various (V)MOVNT* opcodes, forbidding reg -> reg formptitSeb6-56/+74