| Commit message (Expand) | Author | Age | Files | Lines |
| ... | |
| * | [ARM64_DYNAREC] Improved many LOCK prefixed opcodes, espcialy unaligned path | ptitSeb | 2025-02-12 | 4 | -104/+211 |
| * | [ARM64_DYNAREC] More work on flag | ptitSeb | 2025-02-12 | 8 | -605/+472 |
| * | fix VPMASKMOV and VMASKMOVP (#2342) | ye-yeshun | 2025-02-12 | 1 | -67/+205 |
| * | [RCFILE] Improved support for windows setup | ptitSeb | 2025-02-12 | 1 | -1/+1 |
| * | [ARM64_DYNAREC] Fixed F0 0F B1 ocpode (emit_cmp32 can only be used once per o... | ptitSeb | 2025-02-11 | 1 | -10/+13 |
| * | [ARM64_DYNAREC] Fixed wrong COUNT operand in VPSLL{W,D,Q} (#2344) | wannacu | 2025-02-11 | 1 | -12/+15 |
| * | [LA64_DYNAREC] Added F3 0F 52 RSQRTSS opcode (#2343) | Yang Liu | 2025-02-11 | 1 | -0/+13 |
| * | [ARM64_DYNAREC] Added code on safeflags=2 to check if SI/DI memory overlap on... | ptitSeb | 2025-02-11 | 2 | -1/+15 |
| * | [LA64_DYNAREC] Added F2 0F 7D HSUBPS opcode (#2341) | Yang Liu | 2025-02-11 | 1 | -0/+11 |
| * | [ARM64_DYNAREC] Some changes on shift opcode and OF handling, and added some ... | ptitSeb | 2025-02-10 | 1 | -31/+45 |
| * | [ARM64_DYNAREC] Mostly cosmetic change on (I)DIV 8bits opcode | ptitSeb | 2025-02-10 | 1 | -35/+31 |
| * | [LA64_DYNAREC] Added preliminary optimization for REP MOVSB (#2340) | Yang Liu | 2025-02-10 | 2 | -0/+28 |
| * | [LA64_DYNAREC] Added more opcodes (#2339) | Yang Liu | 2025-02-10 | 5 | -0/+201 |
| * | [DYNAREC] Fixed inst_size building that could be wrong when dynablock was sto... | ptitSeb | 2025-02-09 | 9 | -14/+17 |
| * | [LA64_DYNREC] Added more opcodes (#2338) | Yang Liu | 2025-02-09 | 5 | -0/+82 |
| * | [DYNAREC] Fixed diff logging prefix of pass2&3 (#2337) | Yang Liu | 2025-02-09 | 1 | -4/+4 |
| * | [LA64_DYNAREC] Fixed newly added 66 0F BA /4 BT opcode (#2336) | Yang Liu | 2025-02-09 | 1 | -1/+5 |
| * | [ARM64_DYNAREC] Fixed a potential segfault when signal happens while running ... | ptitSeb | 2025-02-09 | 1 | -0/+2 |
| * | [LA64_DYNAREC] Added more opcodes (#2333) | Yang Liu | 2025-02-08 | 1 | -0/+11 |
| * | [ARM64_DYNAREC] Minor simplifications with the usage of GETEX (#2332) | Yang Liu | 2025-02-08 | 1 | -14/+2 |
| * | [RV64_DYNAREC] Minor fixes and improvements on various opcodes (#2331) | Yang Liu | 2025-02-08 | 2 | -29/+36 |
| * | [LA64_DYNAREC] Added more opcodes (#2330) | Yang Liu | 2025-02-08 | 5 | -0/+178 |
| * | [LA64_DYNAREC] Added more opcodes (#2328) | Yang Liu | 2025-02-08 | 3 | -0/+35 |
| * | [RV64_DYNAREC] Added aligned optim case for REP MOVSB (#2327) | Yang Liu | 2025-02-08 | 4 | -1/+39 |
| * | [ARM64_DYNAREC] Optimized unaligned path for REP MOVSB | ptitSeb | 2025-02-08 | 1 | -1/+15 |
| * | [ARM64_DYNAREC] Added more aligned optim cases for REP MOVSB (#2326) | Yang Liu | 2025-02-08 | 4 | -1/+18 |
| * | [RCFILE] Fixed ROLLING_LOG when setup in a profile only | ptitSeb | 2025-02-07 | 2 | -6/+13 |
| * | [LA64_DYNAREC] Added more opcodes (#2324) | Yang Liu | 2025-02-07 | 2 | -0/+13 |
| * | [LA64_DYNAREC] Added more opcodes (#2323) | Yang Liu | 2025-02-07 | 3 | -0/+30 |
| * | [LA64_DYNAREC] Added more 66 0F 38 opcodes (#2322) | Yang Liu | 2025-02-07 | 1 | -0/+19 |
| * | [LA64_DYNAREC] Fixed F3 0F MOVSLDUP opcode (#2321) | Yang Liu | 2025-02-07 | 1 | -1/+1 |
| * | [ARM64_DYNAREC] Optimized REP MOVSB | ptitSeb | 2025-02-07 | 3 | -0/+57 |
| * | [RV64_DYNAREC] Small optim to 64 A1/A3 opcodes (#2320) | Yang Liu | 2025-02-07 | 1 | -6/+12 |
| * | [DYNAREC] Optimized grab_segdata calls on MODREG (#2319) | Yang Liu | 2025-02-07 | 13 | -126/+129 |
| * | [LA64_DYNAREC] Added 64 88 MOV opcode (#2318) | Yang Liu | 2025-02-07 | 1 | -1/+34 |
| * | [ARM64_DYNAREC] Small optims/fixes for a few F2 0F prefixed opcodes | ptitSeb | 2025-02-06 | 1 | -6/+16 |
| * | [ARM64_DYNAREC] Added a comment in emitter on FCMP behaviour | ptitSeb | 2025-02-06 | 1 | -0/+3 |
| * | [INTERPRETER] Small optim on HADDPS and HSUBPS | ptitSeb | 2025-02-06 | 1 | -4/+2 |
| * | [ARM64_DYNAREC] Fixed fstp long double when fastround==0 | ptitSeb | 2025-02-06 | 3 | -5/+48 |
| * | [RCFILE] Adjusted MALLOC_HACK to be an integer between 0 and 2 instead of a B... | ptitSeb | 2025-02-06 | 1 | -1/+1 |
| * | [DYNAREC] Fixed a potential SEGFAULT in FindDynablockFromNativeAddress, and a... | ptitSeb | 2025-02-05 | 1 | -2/+4 |
| * | Remove memory location test for traping wine syscall, box64 doesn't need that | ptitSeb | 2025-02-05 | 1 | -1/+1 |
| * | [DYNAREC] Fixed a rare issue when flags would not be computed on 1st opcode o... | ptitSeb | 2025-02-04 | 1 | -1/+1 |
| * | [ARM64_DYNAREC] Reduce the number of false positive for DYNAREC_MISSING=1 by ... | ptitSeb | 2025-02-03 | 3 | -5/+8 |
| * | [ARM64_DYNAREC] Optmized RCR Eb, CL, and fixed RCL Eb, CL opcode | ptitSeb | 2025-02-03 | 1 | -23/+40 |
| * | [ARM64_DYNAREC] Optimized RCL Eb, CL opcode | ptitSeb | 2025-02-03 | 1 | -4/+33 |
| * | [ARM64_DYNAREC] Added more details on Need optim message for easier grep | ptitSeb | 2025-02-03 | 8 | -38/+38 |
| * | [ARM64_DYNAREC] Small optims on a few 66 prefixed opcodes | ptitSeb | 2025-02-03 | 2 | -16/+27 |
| * | Added auto-generated x64Int3 printer (#2311) | Yang Liu | 2025-02-02 | 2 | -4/+6452 |
| * | [ARM64_DYNAREC] Small improvment on 64 prefixed opcodes | ptitSeb | 2025-02-02 | 5 | -120/+70 |