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* [RV64_DYNAREC] modify DF default /4 opcode (#1633)LiZhuoheng2024-07-041-5/+14
| | | | | * [RV64_DYNAREC] modify DF default /4 opcode * [RV64_DYNAREC] added DF default /4 opcode
* [RV64_DYNAREC] Added DF default /4 opcode (#1631)LiZhuoheng2024-07-031-0/+27
| | | | | * [RV64_DYNAREC] Added DF default /4 opcode * replace tabs to spaces
* Detect UnityPlayer.dll to apply strongmem=1 automatically (can be disabled ↵ptitSeb2024-07-034-0/+28
| | | | with BOX64_UNITYPLAYER=0)
* Add missing func declarations: `get_first_jump_addr` (#1627)Yip Coekjan2024-07-022-0/+2
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* Handle `.relr.dyn` section (#1626)Yip Coekjan2024-07-027-1/+73
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* [DYNAREC] Improved cache coherency and internal jump handling, ↵ptitSeb2024-07-025-4/+52
| | | | [ARM64_DYNAREC] Improved YMM register tracking
* Added one more wrapped function to gnutlsptitSeb2024-07-021-0/+1
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* Wrapped libsqlite3 (#1625)Yang Liu2024-07-019-0/+360
| | | | | * Wrapped libsqlite3 * More functions
* [DYNAREC] Reset fpu scratch after Instruction epilogptitSeb2024-07-011-2/+1
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* Wrapped more functions (#1624)Yang Liu2024-07-018-40/+83
| | | | | | | | | * Wrapped more gtk functions * Wrapped 1 more gdk3 function * Wrapped more gnutls functions * Added generated files
* [DYNAREC] Keep internal jmp table to the endptitSeb2024-07-011-3/+4
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* [ARM64_DYNAREC] Fixed some regression on internal jumpsptitSeb2024-07-012-2/+2
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* [ARM64_DYNAREC] Added 64/65 70-7F/EB opcodesptitSeb2024-06-301-0/+22
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* {ARM64_DYNAREC] Small optimisation on F3 0F BC/BD opcodesptitSeb2024-06-281-12/+20
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* [ARM64_DYNAREC] Fixed printer for DUP opcodeptitSeb2024-06-281-1/+1
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* [ARM64_DYNAREC] Added AVX.66.0F38 91/93 opcodesptitSeb2024-06-281-0/+74
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* [ARM64_DYNAREC] Fixed AVX.66.0F3A 06/46/21 opcodesptitSeb2024-06-281-40/+6
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* [RV64_DYNAREC] Added vector instructions emitter (#1621)Yang Liu2024-06-271-79/+533
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* [RV64_DYNAREC] Detect vector extension (#1619)Yang Liu2024-06-273-0/+8
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* [ARM64_DYNAREC] Improved commentptitSeb2024-06-261-1/+2
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* small fix for ROR and ROL (#1618)liuli2024-06-261-2/+2
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* [INTERPRETER] Added 64/65 F3 0F 58 opcodeptitSeb2024-06-251-0/+13
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* [ARM64_DYNAREC] Small fixes to 0F C7 /6 opcodeptitSeb2024-06-251-3/+4
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* [RV64_DYNAREC] Fixed regression on D9 E5 FXAM opcode (#1616)Yang Liu2024-06-251-4/+9
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* [COSIM] Added range handling in BOX64_DYNAREC_TEST ([RCFILE] too)ptitSeb2024-06-244-2/+46
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* [INTERPRETER] opcode F1 is valid alson in 64bitsptitSeb2024-06-241-4/+0
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* [INTERPRETER] Added 32bits F1 opcodeptitSeb2024-06-241-0/+10
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* [ARM64_DYNAREC] Added 0F C7 /6 opcode, with hardware support if presentptitSeb2024-06-244-0/+31
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* Improved CPUID a bit more, adding RDRAND (helps geekbench6 avx2 version)ptitSeb2024-06-243-7/+75
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* [ARM64_DYNAREC] Fixed AVX.66.0F38 90/92 opcodesptitSeb2024-06-241-10/+12
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* Fixed AVX.66.0F38 90-93 opcodes (certain special cases)ptitSeb2024-06-241-2/+2
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* [ARM64_DYNAREC] Minor fix on printer for SMOV/UMOVptitSeb2024-06-241-6/+4
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* [ARM64_DYNAREC] Reworked ymm_zero handling on internal jumpptitSeb2024-06-234-17/+25
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* [TRACE] Print offset in function in hexptitSeb2024-06-231-1/+1
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* [DYNAREC] Try to limit UpdateFlags on internal jumpsptitSeb2024-06-237-9/+19
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* [ARM64_DYNAREC] Some small optims to a few AVX opcodesptitSeb2024-06-233-6/+44
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* Small improvment to 0F BC/BD opcodes ([ARM64_DYNAREC] too)ptitSeb2024-06-232-6/+6
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* [ARM64_DYNAREC] Fixed printer for MOVI_64ptitSeb2024-06-231-2/+2
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* [ARM64_DYNAREC] Small optim on 0F BC/BD opcodesptitSeb2024-06-231-4/+8
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* [ARM64_DYNAREC] Fixed an issue with fpuCacheTransform (possible regression)ptitSeb2024-06-221-2/+2
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* Added 66 F2/F3 A4 opcode ({DYNAREC] too)ptitSeb2024-06-224-3/+105
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* [ARM64_DYNAREC] Small improvement to 0F 5D/5F opcodesptitSeb2024-06-221-10/+6
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* [COSIM] Imprroved F2 0F prefixed opcodesptitSeb2024-06-222-25/+26
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* Improved handling of cpuid leaf 0x80000006ptitSeb2024-06-221-1/+1
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* [COSIM] Improved handling of AVX.66.0F38 3E/2F opcodesptitSeb2024-06-221-6/+16
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* [ARM64_DYNAREC] Improved AVX.66.0F38 2E/2F to avoid segfault when mask is nullptitSeb2024-06-211-9/+59
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* Small fix for a signature of a gnutls functionptitSeb2024-06-215-2/+8
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* [RCFILE] Improved hendling of BOX64_NODYNARECptitSeb2024-06-211-14/+16
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* Wrapped pthread_cond_signal with aligned cond like others (#1608)Yang Liu2024-06-212-1/+7
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* [RV64_DYNAREC] Added unaligned support for F0 /5 LOCK SUB opcode (#1607)Yang Liu2024-06-201-1/+21
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