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* {ARM64_DYNAREC] Small optimisation on F3 0F BC/BD opcodesptitSeb2024-06-281-12/+20
* [ARM64_DYNAREC] Fixed printer for DUP opcodeptitSeb2024-06-281-1/+1
* [ARM64_DYNAREC] Added AVX.66.0F38 91/93 opcodesptitSeb2024-06-281-0/+74
* [ARM64_DYNAREC] Fixed AVX.66.0F3A 06/46/21 opcodesptitSeb2024-06-281-40/+6
* [RV64_DYNAREC] Added vector instructions emitter (#1621)Yang Liu2024-06-271-79/+533
* [RV64_DYNAREC] Detect vector extension (#1619)Yang Liu2024-06-273-0/+8
* [ARM64_DYNAREC] Improved commentptitSeb2024-06-261-1/+2
* small fix for ROR and ROL (#1618)liuli2024-06-261-2/+2
* [INTERPRETER] Added 64/65 F3 0F 58 opcodeptitSeb2024-06-251-0/+13
* [ARM64_DYNAREC] Small fixes to 0F C7 /6 opcodeptitSeb2024-06-251-3/+4
* [RV64_DYNAREC] Fixed regression on D9 E5 FXAM opcode (#1616)Yang Liu2024-06-251-4/+9
* [COSIM] Added range handling in BOX64_DYNAREC_TEST ([RCFILE] too)ptitSeb2024-06-244-2/+46
* [INTERPRETER] opcode F1 is valid alson in 64bitsptitSeb2024-06-241-4/+0
* [INTERPRETER] Added 32bits F1 opcodeptitSeb2024-06-241-0/+10
* [ARM64_DYNAREC] Added 0F C7 /6 opcode, with hardware support if presentptitSeb2024-06-244-0/+31
* Improved CPUID a bit more, adding RDRAND (helps geekbench6 avx2 version)ptitSeb2024-06-243-7/+75
* [ARM64_DYNAREC] Fixed AVX.66.0F38 90/92 opcodesptitSeb2024-06-241-10/+12
* Fixed AVX.66.0F38 90-93 opcodes (certain special cases)ptitSeb2024-06-241-2/+2
* [ARM64_DYNAREC] Minor fix on printer for SMOV/UMOVptitSeb2024-06-241-6/+4
* [ARM64_DYNAREC] Reworked ymm_zero handling on internal jumpptitSeb2024-06-234-17/+25
* [TRACE] Print offset in function in hexptitSeb2024-06-231-1/+1
* [DYNAREC] Try to limit UpdateFlags on internal jumpsptitSeb2024-06-237-9/+19
* [ARM64_DYNAREC] Some small optims to a few AVX opcodesptitSeb2024-06-233-6/+44
* Small improvment to 0F BC/BD opcodes ([ARM64_DYNAREC] too)ptitSeb2024-06-232-6/+6
* [ARM64_DYNAREC] Fixed printer for MOVI_64ptitSeb2024-06-231-2/+2
* [ARM64_DYNAREC] Small optim on 0F BC/BD opcodesptitSeb2024-06-231-4/+8
* [ARM64_DYNAREC] Fixed an issue with fpuCacheTransform (possible regression)ptitSeb2024-06-221-2/+2
* Added 66 F2/F3 A4 opcode ({DYNAREC] too)ptitSeb2024-06-224-3/+105
* [ARM64_DYNAREC] Small improvement to 0F 5D/5F opcodesptitSeb2024-06-221-10/+6
* [COSIM] Imprroved F2 0F prefixed opcodesptitSeb2024-06-222-25/+26
* Improved handling of cpuid leaf 0x80000006ptitSeb2024-06-221-1/+1
* [COSIM] Improved handling of AVX.66.0F38 3E/2F opcodesptitSeb2024-06-221-6/+16
* [ARM64_DYNAREC] Improved AVX.66.0F38 2E/2F to avoid segfault when mask is nullptitSeb2024-06-211-9/+59
* Small fix for a signature of a gnutls functionptitSeb2024-06-215-2/+8
* [RCFILE] Improved hendling of BOX64_NODYNARECptitSeb2024-06-211-14/+16
* Wrapped pthread_cond_signal with aligned cond like others (#1608)Yang Liu2024-06-212-1/+7
* [RV64_DYNAREC] Added unaligned support for F0 /5 LOCK SUB opcode (#1607)Yang Liu2024-06-201-1/+21
* Add missing wrappings for winewayland.so (#1599)Michael Büchler2024-06-203-8/+61
* Added a few more symbols, used by latest steam for linux (for #1603)ptitSeb2024-06-191-1/+2
* [ARM64_DYNAREC] Fixed AVX.F2.0F3A F0 opcodeptitSeb2024-06-191-0/+1
* Update arm64_immenc.c (#1602)salt4312024-06-191-71/+73
* [RV64_DYNAREC] Fixed potential issue of jump_to_next (#1600)Yang Liu2024-06-182-3/+3
* Added BOX64_RESERVE_HIGH in rcfile handlingptitSeb2024-06-182-8/+23
* Added 1 more wrapped symbol to libmpg123ptitSeb2024-06-181-1/+1
* [ARM64_DYNAREC] Added a warning if allocating a scratch register after some YMMptitSeb2024-06-181-0/+2
* [ARM64_DYNAREC] Fixed AVX.66.0F 6B opcodeptitSeb2024-06-181-2/+2
* [ARM64_DYNAREC] Restaured a better way to handle ymm register, now that the t...ptitSeb2024-06-183-24/+18
* [ARM64_DYNAREC] Fixed AVX.66.0F3A 19/39 opcodesptitSeb2024-06-181-3/+8
* [ARM64_DYNAREC] Better tracking of used ymm (seems redundent with ymm0_sub)ptitSeb2024-06-181-13/+16
* [TRACE] Cosmetic change on ymm printoutptitSeb2024-06-181-1/+1