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* [ARM64_DYNAREC] Added faked F3 0F AE /5 unsupported opcodeptitSeb2024-06-141-0/+5
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* Fixed an issue with BOX64_RDTSC_1GHZ being always activeptitSeb2024-06-131-1/+1
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* [ANDROID] This should fix android buildptitSeb2024-06-131-0/+2
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* [ARM64_DYNAREC] Added AVX.66.0F 7C opcodeptitSeb2024-06-131-0/+28
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* More work on RDTSC emulationptitSeb2024-06-137-37/+66
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* Added more wrapped function to libunistring2 (#1582)LiZhuoheng2024-06-134-0/+42
| | | | | * Added more wrapped function to libunistring2 * add wrapper.c
* [WAYLAND] Wrapped one more listenerptitSeb2024-06-121-0/+29
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* Better wrapping for libwayland-client, removed the x64 versions of the libs, ↵ptitSeb2024-06-127-45/+494
| | | | using wrapped one instead
* Removed wrapped libwayland-client and libwayland-cursor, the wrapping is ↵ptitSeb2024-06-124-26/+2
| | | | wrong, and use native libs instead
* Wrapped libhogweed6 (#1579)LiZhuoheng2024-06-127-0/+69
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* Added one structure to libwayland-clinet and auto bridges all current interfacesptitSeb2024-06-112-6/+43
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* Fixed libudev.so.0 wrapping, removed functions from libudev.so.1ptitSeb2024-06-114-126/+6
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* [ARM64_DYNAREC] Added AVX.0F 77 256bits opcodeptitSeb2024-06-111-2/+11
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* [INTERPRETER] Added AVX.0F 77 256bits opcodeptitSeb2024-06-111-2/+8
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* Remove and obsolete commentptitSeb2024-06-111-1/+0
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* [ARM64_DYNAREC] Fixed AVX.66.0F E1-E3 opcodes and Added AVX.66.0F C6 and ↵ptitSeb2024-06-112-11/+60
| | | | AVX.0F 17 opcodes
* [ARM64_DYNAREC] Added AVX.66.0F38 02/0B opcodesptitSeb2024-06-111-2/+18
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* [ARM64_DYNAREC] Fixed another issue with Ymm value when updating flags on ↵ptitSeb2024-06-111-2/+2
| | | | internal jump
* [ARM64_DYNAREC] Added AVX.66.0F38 5A opcodeptitSeb2024-06-111-0/+8
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* [ARM64_DYNAREC] Fixed another issue with Ymm0 mask and reset_cache on ↵ptitSeb2024-06-111-2/+2
| | | | internal jump
* Wrapped libunistring2 (#1577)LiZhuoheng2024-06-117-0/+58
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* [ARM64_DYNAREC] Added AVX.66.0F38 90/92 opcodes and added AVX.66.0F38 04 opcodeptitSeb2024-06-101-5/+32
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* [ARM64_DYNAREC] Fixed AVX.66.0F3A 00/01 opcodesptitSeb2024-06-101-4/+6
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* [ARM64_DYNAREC] Fixed 256bits version of AVX.66.0F D1/D2/D3 opcodesptitSeb2024-06-101-15/+21
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* [ARM64_DYNAREC] Cosmetic changeptitSeb2024-06-101-1/+0
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* [COSIM] Fixed 66 48 xx type of opcodesptitSeb2024-06-091-2/+5
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* [ARM64_DYNAREC] Fixed an issue when not purging Ymm0 on internal jump with ↵ptitSeb2024-06-091-8/+8
| | | | less Ymm0
* [ARM64_DYNAREC] Fixed AVX.66.0F38 28 opcodeptitSeb2024-06-091-1/+1
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* [ARM64_DYNAREC] Fixed AVX.66.0F 7F opcodeptitSeb2024-06-091-2/+2
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* [DYNAREC] Another fix for YMM Zero'd upper reg trackingptitSeb2024-06-099-45/+55
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* [ARM64_DYNAREC] Added AVX.66.0F38 41/8E/9B, AVX.66.0F3A 06 and AVX.66.0F F6 ↵ptitSeb2024-06-084-0/+156
| | | | opcodes
* [ARM64_DYNAREC] Another fix for YMM selection on High registry pressure casesptitSeb2024-06-083-17/+44
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* [ARM64_DYNAREC] Added AVX.66.0F 50/C2, AVX.66.0F3A 0D, AVX.66.0F38 ↵ptitSeb2024-06-086-3/+228
| | | | 16/28/29/2B/36/AC/BA and AVX.F2.0F 51 opcodes
* Remove a warning on known unhandled arch_prctl commandsptitSeb2024-06-081-0/+13
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* [ARM64_DYNAREC] Small optim on 66 0F 50 opcodeptitSeb2024-06-081-5/+4
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* [INTERPRETER] Fixed AVX.66.0F 50 opcode not handling vex.lptitSeb2024-06-081-0/+5
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* [ARM64_DYNAREC] Added AVX.66.0F E6, AVX.66.0F38 98 and fixed AVX.F2.0F E6 ↵ptitSeb2024-06-083-6/+61
| | | | opcodes
* [ARM64_DYNAREC] Fixed an issue when purging an YMM that is used in the same ↵ptitSeb2024-06-084-0/+16
| | | | opcode
* Added 2 wrapped function to libglib2ptitSeb2024-06-081-0/+2
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* Only expose xsave extension if avx is usedptitSeb2024-06-071-2/+2
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* [DYNAREC] This should fix RV64 and LA64 buildsptitSeb2024-06-076-4/+12
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* [ARM64_DYNAREC] Fixed YMM cache handling, espcially in high pressure regs casesptitSeb2024-06-078-83/+140
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* [RV64_DYNAREC] Fixed sign extension of 8-bit immediate in 66 opcodes (#1568)xctan2024-06-072-10/+10
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* [ARM64_DYNAREC] Added BMI.0F38 F2, F3/1 opcodesptitSeb2024-06-071-0/+46
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* [ARM64_DYNAREC] That's just cosmetic...ptitSeb2024-06-071-2/+2
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* Wrapped libnettle8 (#1567)LiZhuoheng2024-06-077-0/+186
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* [RV64_DYNAREC] Fixed some opcodes caught by cosim (#1561)xctan2024-06-0610-97/+130
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * [RV64_DYNAREC] Fixed emit_shrd16c * [RV64_DYNAREC] Fixed BSWAP Gw * [RV64_DYNAREC] Fixed 32 bit RCL/RCR Ed, 1 * [RV64_DYNAREC] Fixed 32 bit BTR * [RV64_DYNAREC] Fixed 32 bit SHLD * [RV64_DYNAREC] Fixed 32 bit SHLD again * [RV64_DYNAREC] Fixed 16 bit constant SHLD again * [RV64_DYNAREC] Fixed 16-bit BTC * [RV64_DYNAREC] Fixed 32-bit rotates using Zbb extension * [RV64_DYNAREC] Fixed 16-bit SHLD opcode * [RV64_DYNAREC] Fixed the mask of LAHF opcode * [RV64_DYNAREC] Fixed LAHF again and handled OF2 before cosim * [RV64_DYNAREC] Fixed XADD Eb, Gb when Eb == Gb * [RV64_DYNAREC] Fixed XADD Ew, Gw when Ew == Gw * [RV64_DYNAREC] Fixed zero extension of 32 bit Ed operand * [RV64_DYNAREC] Fixed XADD Eb, Gb again for AH, BH, CH, DH * [RV64_DYNAREC] Fixed various 16-bit immediate extension
* [INTERPRETER] Added suport for F16C extension (linked to AVX flag) ↵ptitSeb2024-06-0610-8/+216
| | | | ([ARM64_DYNAREC] too)
* Disable F16C for now, it's not ready yetptitSeb2024-06-061-1/+1
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* [ARM64_DYNAREC] Added a new small batch of AVX/BMI2 opcodesptitSeb2024-06-0610-10/+207
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