From 368f14b4ce1ae8635f4df2e1295fe745c2db867d Mon Sep 17 00:00:00 2001 From: Yang Liu Date: Mon, 4 Aug 2025 20:35:32 +0800 Subject: [LA64_DYNAREC] Fixed F3 0F 53 RCPSS opcode (#2892) --- src/dynarec/la64/dynarec_la64_f30f.c | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/src/dynarec/la64/dynarec_la64_f30f.c b/src/dynarec/la64/dynarec_la64_f30f.c index 6078198b..daad35f4 100644 --- a/src/dynarec/la64/dynarec_la64_f30f.c +++ b/src/dynarec/la64/dynarec_la64_f30f.c @@ -188,9 +188,9 @@ uintptr_t dynarec64_F30F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int GETGX(v0, 1); GETEXSS(v1, 0, 0); q0 = fpu_get_scratch(dyn); - if(cpuext.frecipe){ + if (cpuext.frecipe) { FRSQRTE_S(q0, v1); - }else{ + } else { FRSQRT_S(q0, v1); } VEXTRINS_W(v0, q0, 0); @@ -201,11 +201,7 @@ uintptr_t dynarec64_F30F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int GETGX(v0, 1); GETEXSS(v1, 0, 0); d1 = fpu_get_scratch(dyn); - if(cpuext.frecipe){ - FRECIPE_S(d1, v1); - }else{ - FRECIP_S(d1, v1); - } + FRECIP_S(d1, v1); VEXTRINS_W(v0, d1, 0); break; case 0x58: -- cgit 1.4.1