From 4bb4e45836d5b08a1396cfea73abaabb807e9506 Mon Sep 17 00:00:00 2001 From: Yang Liu Date: Mon, 4 Aug 2025 17:27:17 +0800 Subject: [LA64_DYNAREC] Fixed 66 0F 3A 0C/0D BLENDPS/D opcodes (#2887) --- src/dynarec/la64/dynarec_la64_660f.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/dynarec/la64/dynarec_la64_660f.c b/src/dynarec/la64/dynarec_la64_660f.c index 06785529..dcec31da 100644 --- a/src/dynarec/la64/dynarec_la64_660f.c +++ b/src/dynarec/la64/dynarec_la64_660f.c @@ -955,7 +955,7 @@ uintptr_t dynarec64_660F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int INST_NAME("BLENDPS Gx, Ex, Ib"); nextop = F8; GETGX(q0, 1); - GETEXSS(q1, 0, 1); + GETEX(q1, 0, 1); u8 = F8 & 0b1111; if ((u8 & 0b11) == 0b11) { VEXTRINS_D(q0, q1, 0); @@ -974,7 +974,7 @@ uintptr_t dynarec64_660F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int INST_NAME("BLENDPD Gx, Ex, Ib"); nextop = F8; GETGX(q0, 1); - GETEXSD(q1, 0, 1); + GETEX(q1, 0, 1); u8 = F8 & 0b11; if (u8 == 0b01) { VEXTRINS_D(q0, q1, 0b00000000); -- cgit 1.4.1