From 5f144d8ddde847fd6e99d1739940cfd3cbf3779e Mon Sep 17 00:00:00 2001 From: Yang Liu Date: Mon, 18 Aug 2025 18:42:28 +0800 Subject: [RV64_DYNAREC] Added scalar AVX VMOVDQA opcodes (#2948) --- src/dynarec/rv64/dynarec_rv64_avx_66_0f.c | 42 +++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+) diff --git a/src/dynarec/rv64/dynarec_rv64_avx_66_0f.c b/src/dynarec/rv64/dynarec_rv64_avx_66_0f.c index e7389fc2..64d2a93f 100644 --- a/src/dynarec/rv64/dynarec_rv64_avx_66_0f.c +++ b/src/dynarec/rv64/dynarec_rv64_avx_66_0f.c @@ -78,6 +78,27 @@ uintptr_t dynarec64_AVX_66_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, SD(xZR, gyback, gyoffset); SD(xZR, gyback, gyoffset + 8); break; + case 0x6F: + INST_NAME("VMOVDQA Gx, Ex"); + nextop = F8; + GETEX(x2, 0, vex.l ? 24 : 8); + GETGX(); + GETGY(); + LD(x3, wback, fixedaddress); + SD(x3, gback, gdoffset); + LD(x3, wback, fixedaddress + 8); + SD(x3, gback, gdoffset + 8); + if (vex.l) { + GETEY(); + LD(x3, wback, fixedaddress); + SD(x3, gyback, gyoffset); + LD(x3, wback, fixedaddress + 8); + SD(x3, gyback, gyoffset + 8); + } else { + SD(xZR, gyback, gyoffset); + SD(xZR, gyback, gyoffset + 8); + } + break; case 0x7E: INST_NAME("VMOVD Ed, Gx"); nextop = F8; @@ -103,6 +124,27 @@ uintptr_t dynarec64_AVX_66_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, } } break; + case 0x7F: + INST_NAME("VMOVDQA Ex, Gx"); + nextop = F8; + GETEX(x2, 0, vex.l ? 24 : 8); + GETGX(); + GETGY(); + LD(x3, gback, gdoffset); + SD(x3, wback, fixedaddress); + LD(x3, gback, gdoffset + 8); + SD(x3, wback, fixedaddress + 8); + if (vex.l) { + GETEY(); + LD(x3, gyback, gyoffset); + SD(x3, wback, fixedaddress); + LD(x3, gyback, gyoffset + 8); + SD(x3, wback, fixedaddress + 8); + } else if (MODREG) { + SD(xZR, wback, fixedaddress); + SD(xZR, wback, fixedaddress + 8); + } + break; default: DEFAULT; } -- cgit 1.4.1