From 994a575d32cd27247734364f6cba4fae23d4eafe Mon Sep 17 00:00:00 2001
From: ptitSeb <sebastien.chev@gmail.com>
Date: Thu, 18 Mar 2021 16:55:50 +0100
Subject: [DYNAREC] Added B8..BF opcodes

---
 src/dynarec/dynarec_arm64_00.c     | 20 ++++++++++++++++++++
 src/dynarec/dynarec_arm64_helper.h |  1 +
 2 files changed, 21 insertions(+)

diff --git a/src/dynarec/dynarec_arm64_00.c b/src/dynarec/dynarec_arm64_00.c
index 1e04416d..cdd25353 100755
--- a/src/dynarec/dynarec_arm64_00.c
+++ b/src/dynarec/dynarec_arm64_00.c
@@ -34,6 +34,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
     uint8_t u8;
     uint8_t gb1, gb2, eb1, eb2;
     uint32_t u32;
+    uint64_t u64;
     uint8_t wback, wb1, wb2;
     int fixedaddress;
     rex_t rex;
@@ -477,6 +478,25 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             }
             break;
 
+        case 0xB8:
+        case 0xB9:
+        case 0xBA:
+        case 0xBB:
+        case 0xBC:
+        case 0xBD:
+        case 0xBE:
+        case 0xBF:
+            INST_NAME("MOV Reg, Id");
+            gd = xRAX+(opcode&7)+(rex.b<<3);
+            if(rex.w) {
+                u64 = F64;
+                MOV64x(gd, u64);
+            } else {
+                u32 = F32;
+                MOV32w(gd, u32);
+            }
+            break;
+
         case 0xC1:
             nextop = F8;
             switch((nextop>>3)&7) {
diff --git a/src/dynarec/dynarec_arm64_helper.h b/src/dynarec/dynarec_arm64_helper.h
index 0baf34eb..e89bde40 100755
--- a/src/dynarec/dynarec_arm64_helper.h
+++ b/src/dynarec/dynarec_arm64_helper.h
@@ -22,6 +22,7 @@
 #define F32     *(uint32_t*)(addr+=4, addr-4)
 #define F32S    *(int32_t*)(addr+=4, addr-4)
 #define F32S64  (uint64_t)(int64_t)F32S
+#define F64     *(uint64_t*)(addr+=8, addr-8)
 #define PK(a)   *(uint8_t*)(addr+a)
 #define PK16(a)   *(uint16_t*)(addr+a)
 #define PK32(a)   *(uint32_t*)(addr+a)
-- 
cgit 1.4.1