From a7a211fc85ef86f9a0573467ced3bcedb625d299 Mon Sep 17 00:00:00 2001 From: liuli Date: Wed, 26 Jun 2024 13:23:13 +0800 Subject: small fix for ROR and ROL (#1618) --- src/dynarec/arm64/dynarec_arm64_66.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/dynarec/arm64/dynarec_arm64_66.c b/src/dynarec/arm64/dynarec_arm64_66.c index 3dc765df..12efb37b 100644 --- a/src/dynarec/arm64/dynarec_arm64_66.c +++ b/src/dynarec/arm64/dynarec_arm64_66.c @@ -979,7 +979,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin if (u8) { SETFLAGS(X_CF | X_OF, SF_SUBSET_PENDING); GETEW(x1, 1); - u8 = F8; + u8 = (F8)&0x1f; emit_rol16c(dyn, ninst, x1, u8, x4, x5); EWBACK; } else { @@ -992,7 +992,7 @@ uintptr_t dynarec64_66(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin if (geted_ib(dyn, addr, ninst, nextop) & 15) { SETFLAGS(X_CF | X_OF, SF_SUBSET_PENDING); GETEW(x1, 1); - u8 = F8; + u8 = (F8)&0x1f; emit_ror16c(dyn, ninst, x1, u8, x4, x5); EWBACK; } else { -- cgit 1.4.1