From ca44d84e554ec644fd36f8befeadd5431183bb13 Mon Sep 17 00:00:00 2001 From: Alexandre Julliard Date: Fri, 24 Feb 2023 16:25:07 +0100 Subject: [DYNAREC] Fix the opcode bit in the generated TBX instruction. Currently unused, spotted by reading the code. --- src/dynarec/arm64/arm64_emitter.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/dynarec/arm64/arm64_emitter.h b/src/dynarec/arm64/arm64_emitter.h index c3d62074..b25d490d 100755 --- a/src/dynarec/arm64/arm64_emitter.h +++ b/src/dynarec/arm64/arm64_emitter.h @@ -1365,13 +1365,13 @@ //Use Rm[] to pick from Rn, Rn+1, Rn+2, Rn+3 element and store in Rd. Out-of-range element gets 0 #define VTBLQ4_8(Rd, Rn, Rm) EMIT(TBL_gen(1, Rm, 0b11, 0, Rn, Rd)) //Use Rm[] to pick from Rn element and store in Rd. Out-of-range element stay untouched -#define VTBXQ1_8(Rd, Rn, Rm) EMIT(TBL_gen(1, Rm, 0b00, 0, Rn, Rd)) +#define VTBXQ1_8(Rd, Rn, Rm) EMIT(TBL_gen(1, Rm, 0b00, 1, Rn, Rd)) //Use Rm[] to pick from Rn, Rn+1 element and store in Rd. Out-of-range element stay untouched -#define VTBXQ2_8(Rd, Rn, Rm) EMIT(TBL_gen(1, Rm, 0b01, 0, Rn, Rd)) +#define VTBXQ2_8(Rd, Rn, Rm) EMIT(TBL_gen(1, Rm, 0b01, 1, Rn, Rd)) //Use Rm[] to pick from Rn, Rn+1, Rn+2 element and store in Rd. Out-of-range element stay untouched -#define VTBXQ3_8(Rd, Rn, Rm) EMIT(TBL_gen(1, Rm, 0b10, 0, Rn, Rd)) +#define VTBXQ3_8(Rd, Rn, Rm) EMIT(TBL_gen(1, Rm, 0b10, 1, Rn, Rd)) //Use Rm[] to pick from Rn, Rn+1, Rn+2, Rn+3 element and store in Rd. Out-of-range element stay untouched -#define VTBXQ4_8(Rd, Rn, Rm) EMIT(TBL_gen(1, Rm, 0b11, 0, Rn, Rd)) +#define VTBXQ4_8(Rd, Rn, Rm) EMIT(TBL_gen(1, Rm, 0b11, 1, Rn, Rd)) // TRN #define TRN_gen(Q, size, Rm, op, Rn, Rd) ((Q)<<30 | 0b001110<<24 | (size)<<22 | (Rm)<<16 | (op)<<14 | 0b10<<12 | 0b10<<10 | (Rn)<<5 | (Rd)) -- cgit 1.4.1 From 7cdcb6c4ef2d589e686fafc585e8129e8e7f3450 Mon Sep 17 00:00:00 2001 From: Alexandre Julliard Date: Fri, 24 Feb 2023 16:26:20 +0100 Subject: [DYNAREC] Fetch a quad in PSHUFLW instruction. Only the low 64 bits are shuffled, but the high 64 bits still need to be copied. --- src/dynarec/arm64/dynarec_arm64_f20f.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/dynarec/arm64/dynarec_arm64_f20f.c b/src/dynarec/arm64/dynarec_arm64_f20f.c index 75553bfc..746225ae 100755 --- a/src/dynarec/arm64/dynarec_arm64_f20f.c +++ b/src/dynarec/arm64/dynarec_arm64_f20f.c @@ -307,7 +307,7 @@ uintptr_t dynarec64_F20F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n case 0x70: INST_NAME("PSHUFLW Gx, Ex, Ib"); nextop = F8; - GETEXSD(v1, 0, 1); + GETEX(v1, 0, 1); GETGX(v0, 1); u8 = F8; -- cgit 1.4.1