From 7a95dcd6b6bf51cde91d0cc2a17107b49d17a376 Mon Sep 17 00:00:00 2001 From: ptitSeb Date: Fri, 16 Apr 2021 15:46:03 +0200 Subject: Added E0..E3 opcodes ([DYNAREC] too) --- src/dynarec/dynarec_arm64_00.c | 43 ++++++++++++++++++++++++++++++++++++++ src/dynarec/dynarec_arm64_helper.h | 8 +++++++ 2 files changed, 51 insertions(+) (limited to 'src/dynarec') diff --git a/src/dynarec/dynarec_arm64_00.c b/src/dynarec/dynarec_arm64_00.c index 2f89297e..98ccde9f 100755 --- a/src/dynarec/dynarec_arm64_00.c +++ b/src/dynarec/dynarec_arm64_00.c @@ -1871,6 +1871,49 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin case 0xDF: addr = dynarec64_DF(dyn, addr, ip, ninst, rex, rep, ok, need_epilog); break; + #define GO(Z) \ + BARRIER(2); \ + JUMP(addr+i8); \ + if(dyn->insts) { \ + if(dyn->insts[ninst].x64.jmp_insts==-1) { \ + /* out of the block */ \ + i32 = dyn->insts[ninst+1].address-(dyn->arm_size); \ + if(Z) {CBNZx(xRCX, i32);} else {CBZx(xRCX, i32);}; \ + jump_to_next(dyn, addr+i8, 0, ninst); \ + } else { \ + /* inside the block */ \ + i32 = dyn->insts[dyn->insts[ninst].x64.jmp_insts].address-(dyn->arm_size); \ + if(Z) {CBZx(xRCX, i32);} else {CBNZx(xRCX, i32);}; \ + } \ + } + case 0xE0: + INST_NAME("LOOPNZ"); + READFLAGS(X_ZF); + i8 = F8S; + SUBx_U12(xRCX, xRCX, 1); + TBNZ_NEXT(xFlags, 1<insts)?(dyn->insts[ninst].epilog-(dyn->arm_size)):0; \ CBZx(reg, j64) +// Branch to next instruction if reg is not 0 (use j64) +#define CBNZx_NEXT(reg) \ + j64 = (dyn->insts)?(dyn->insts[ninst].epilog-(dyn->arm_size)):0; \ + CBNZx(reg, j64) // Test bit N of A and branch to next instruction if not set #define TBZ_NEXT(A, N) \ j64 = (dyn->insts)?(dyn->insts[ninst].epilog-(dyn->arm_size)):0; \ TBZ(A, N, j64) +// Test bit N of A and branch to next instruction if set +#define TBNZ_NEXT(A, N) \ + j64 = (dyn->insts)?(dyn->insts[ninst].epilog-(dyn->arm_size)):0; \ + TBNZ(A, N, j64) // Branch to MARKSEG if cond (use j64) #define B_MARKSEG(cond) \ j64 = GETMARKSEG-(dyn->arm_size); \ -- cgit 1.4.1