From b361a0d2ffd11f12cc59757e86dc2e63c92dfdf3 Mon Sep 17 00:00:00 2001
From: ptitSeb <sebastien.chev@gmail.com>
Date: Sat, 14 Sep 2024 08:46:23 +0200
Subject: Fixed flags for AVX.0F38 F2 opcode ([ARM64_DYNAREC] too)

---
 src/dynarec/arm64/dynarec_arm64_avx_0f38.c | 17 ++++++++++++++++-
 1 file changed, 16 insertions(+), 1 deletion(-)

(limited to 'src/dynarec')

diff --git a/src/dynarec/arm64/dynarec_arm64_avx_0f38.c b/src/dynarec/arm64/dynarec_arm64_avx_0f38.c
index 484c7b10..fa18d943 100644
--- a/src/dynarec/arm64/dynarec_arm64_avx_0f38.c
+++ b/src/dynarec/arm64/dynarec_arm64_avx_0f38.c
@@ -68,7 +68,22 @@ uintptr_t dynarec64_AVX_0F38(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, i
             GETGD;
             GETED(0);
             GETVD;
-            BICxw(gd, ed, vd);
+            IFX(X_ZF)
+                BICSxw(gd, ed, vd);
+            else
+                BICxw(gd, ed, vd);
+            IFX(X_ZF) {
+                CSETw(x1, cEQ);
+                BFIw(xFlags, x1, F_ZF, 1);
+            }
+            IFX(X_OF)
+                BFCw(xFlags, F_OF, 1);
+            IFX(X_CF)
+                BFCw(xFlags, F_CF, 1);
+            IFX(X_SF) {
+                LSRxw_IMM(x1, gd, rex.w?63:31);
+                BFIw(xFlags, x1, F_SF, 1);
+            }
             break;
         case 0xF3:
             nextop = F8;
-- 
cgit 1.4.1