From b2c2f7bbd24dec0178af1172c46bbac33f38205b Mon Sep 17 00:00:00 2001
From: ptitSeb <sebastien.chev@gmail.com>
Date: Sun, 23 Jul 2023 11:15:31 +0200
Subject: [32BITS] Added 66 50-5F opcodes ([ARM64_DYNAREC] too, and fixed 66 61
 opcode)

---
 src/emu/x64run66.c | 67 +++++++++++++++++++++++++++++++++++++-----------------
 1 file changed, 46 insertions(+), 21 deletions(-)

(limited to 'src/emu')

diff --git a/src/emu/x64run66.c b/src/emu/x64run66.c
index 4a6f92aa..938fde48 100644
--- a/src/emu/x64run66.c
+++ b/src/emu/x64run66.c
@@ -166,7 +166,33 @@ uintptr_t Run66(x64emu_t *emu, rex_t rex, int rep, uintptr_t addr)
         tmp8u = opcode&7;
         emu->regs[tmp8u].word[0] = dec16(emu, emu->regs[tmp8u].word[0]);
         break;
-
+    case 0x50:
+    case 0x51:
+    case 0x52:
+    case 0x53:
+    case 0x55:
+    case 0x56:
+    case 0x57:                      /* PUSH Reg */
+        if(rex.is32bits) {
+            tmp8u = opcode&7;
+            Push16(emu, emu->regs[tmp8u].word[0]);
+        } else
+            return 0;
+        break;
+    case 0x58:
+    case 0x59:
+    case 0x5A:
+    case 0x5B:
+    case 0x5C:                      /* POP ESP */
+    case 0x5D:
+    case 0x5E:
+    case 0x5F:                      /* POP Reg */
+        if(rex.is32bits) {
+            tmp8u = opcode&7;
+            emu->regs[tmp8u].word[0] = Pop16(emu);
+        } else
+            return 0;
+        break;
     case 0x60:                              /* PUSHA */
         if(rex.is32bits) {
             tmp16u = R_SP;
@@ -338,27 +364,26 @@ uintptr_t Run66(x64emu_t *emu, rex_t rex, int rep, uintptr_t addr)
             GD->word[0] = (uint16_t)tmp64u;
         break;
 
-        case 0x90:                      /* NOP or XCHG R8d, AX*/
-        case 0x91:
-        case 0x92:
-        case 0x93:
-        case 0x94:
-        case 0x95:
-        case 0x96:
-        case 0x97:                      /* XCHG reg,AX */
-            tmp8u = _AX+(opcode&7)+(rex.b<<3);
-            if(tmp8u!=_AX) {
-                if(rex.w) {
-                    tmp64u = R_RAX;
-                    R_RAX = emu->regs[tmp8u].q[0];
-                    emu->regs[tmp8u].q[0] = tmp64u;
-                } else {
-                    tmp16u = R_AX;
-                    R_AX = emu->regs[tmp8u].word[0];
-                    emu->regs[tmp8u].word[0] = tmp16u;
-                }
+    case 0x90:                      /* NOP or XCHG R8d, AX*/
+    case 0x91:
+    case 0x92:
+    case 0x93:
+    case 0x94:
+    case 0x95:
+    case 0x96:
+    case 0x97:                      /* XCHG reg,AX */
+        tmp8u = _AX+(opcode&7)+(rex.b<<3);
+        if(tmp8u!=_AX) {
+            if(rex.w) {
+                tmp64u = R_RAX;
+                R_RAX = emu->regs[tmp8u].q[0];
+                emu->regs[tmp8u].q[0] = tmp64u;
+            } else {
+                tmp16u = R_AX;
+                R_AX = emu->regs[tmp8u].word[0];
+                emu->regs[tmp8u].word[0] = tmp16u;
             }
-            break;
+        }
         break;
 
     case 0x98:                               /* CBW */
-- 
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