From 17ea04766ee185d58335fff6046a0a11f5ea6731 Mon Sep 17 00:00:00 2001 From: phorcys Date: Fri, 18 Jul 2025 15:36:08 +0800 Subject: [LA64_DYNAREC] Add la64 avx pack/unpack ops , part 2. (#2823) VUNPCK{LPS,LPD,HPS,HPD} VPUNPCK{LBW,LWD,LDQ,LQDQ,HBW,HWD,HDQ,HQDQ} --- src/dynarec/la64/dynarec_la64_avx_0f.c | 12 +++++++ src/dynarec/la64/dynarec_la64_avx_66_0f.c | 60 +++++++++++++++++++++++++++++++ src/dynarec/la64/la64_emitter.h | 4 +-- 3 files changed, 74 insertions(+), 2 deletions(-) (limited to 'src') diff --git a/src/dynarec/la64/dynarec_la64_avx_0f.c b/src/dynarec/la64/dynarec_la64_avx_0f.c index 47208926..dc97726e 100644 --- a/src/dynarec/la64/dynarec_la64_avx_0f.c +++ b/src/dynarec/la64/dynarec_la64_avx_0f.c @@ -129,6 +129,18 @@ uintptr_t dynarec64_AVX_0F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, in SMWRITE2(); } break; + case 0x14: + INST_NAME("VUNPCKLPS Gx, Vx, Ex"); + nextop = F8; + GETGY_empty_VYEY_xy(v0, v1, v2, 0); + VILVLxy(W, v0, v2, v1); + break; + case 0x15: + INST_NAME("VUNPCKHPS Gx, Vx, Ex"); + nextop = F8; + GETGY_empty_VYEY_xy(v0, v1, v2, 0); + VILVHxy(W, v0, v2, v1); + break; case 0x16: nextop = F8; GETVYx(v1, 0); diff --git a/src/dynarec/la64/dynarec_la64_avx_66_0f.c b/src/dynarec/la64/dynarec_la64_avx_66_0f.c index 33519001..520cb82c 100644 --- a/src/dynarec/la64/dynarec_la64_avx_66_0f.c +++ b/src/dynarec/la64/dynarec_la64_avx_66_0f.c @@ -126,6 +126,18 @@ uintptr_t dynarec64_AVX_66_0F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, FST_D(v0, ed, fixedaddress); SMWRITE2(); break; + case 0x14: + INST_NAME("VUNPCKLPD Gx, Vx, Ex"); + nextop = F8; + GETGY_empty_VYEY_xy(v0, v1, v2, 0); + VILVLxy(D, v0, v2, v1); + break; + case 0x15: + INST_NAME("VUNPCKHPD Gx, Vx, Ex"); + nextop = F8; + GETGY_empty_VYEY_xy(v0, v1, v2, 0); + VILVHxy(D, v0, v2, v1); + break; case 0x16: INST_NAME("VMOVHPD Gx, Vx, Eq"); nextop = F8; @@ -251,6 +263,24 @@ uintptr_t dynarec64_AVX_66_0F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, GETGY_empty_VYEY_xy(v0, v1, v2, 0); VXOR_Vxy(v0, v1, v2); break; + case 0x60: + INST_NAME("VPUNPCKLBW Gx, Vx, Ex"); + nextop = F8; + GETGY_empty_VYEY_xy(v0, v1, v2, 0); + VILVLxy(B, v0, v2, v1); + break; + case 0x61: + INST_NAME("VPUNPCKLWD Gx, Vx, Ex"); + nextop = F8; + GETGY_empty_VYEY_xy(v0, v1, v2, 0); + VILVLxy(H, v0, v2, v1); + break; + case 0x62: + INST_NAME("VPUNPCKLDQ Gx, Vx, Ex"); + nextop = F8; + GETGY_empty_VYEY_xy(v0, v1, v2, 0); + VILVLxy(W, v0, v2, v1); + break; case 0x63: INST_NAME("VPACKSSWB Gx, Vx, Ex"); nextop = F8; @@ -285,6 +315,24 @@ uintptr_t dynarec64_AVX_66_0F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, VPICKEVxy(B, v0, q1, d0); } break; + case 0x68: + INST_NAME("VPUNPCKHBW Gx, Vx, Ex"); + nextop = F8; + GETGY_empty_VYEY_xy(v0, v1, v2, 0); + VILVHxy(B, v0, v2, v1); + break; + case 0x69: + INST_NAME("VPUNPCKHWD Gx, Vx, Ex"); + nextop = F8; + GETGY_empty_VYEY_xy(v0, v1, v2, 0); + VILVHxy(H, v0, v2, v1); + break; + case 0x6A: + INST_NAME("VPUNPCKHDQ Gx, Vx, Ex"); + nextop = F8; + GETGY_empty_VYEY_xy(v0, v1, v2, 0); + VILVHxy(W, v0, v2, v1); + break; case 0x6B: INST_NAME("VPACKSSDW Gx, Vx, Ex"); nextop = F8; @@ -300,6 +348,18 @@ uintptr_t dynarec64_AVX_66_0F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, VPICKEVxy(H, v0, q0, d0); } break; + case 0x6C: + INST_NAME("VPUNPCKLQDQ Gx, Vx, Ex"); + nextop = F8; + GETGY_empty_VYEY_xy(v0, v1, v2, 0); + VILVLxy(D, v0, v2, v1); + break; + case 0x6D: + INST_NAME("VPUNPCKHQDQ Gx, Vx, Ex"); + nextop = F8; + GETGY_empty_VYEY_xy(v0, v1, v2, 0); + VILVHxy(D, v0, v2, v1); + break; case 0x6E: INST_NAME("VMOVD Gx, Ed"); nextop = F8; diff --git a/src/dynarec/la64/la64_emitter.h b/src/dynarec/la64/la64_emitter.h index f6a4d8ad..755bfbeb 100644 --- a/src/dynarec/la64/la64_emitter.h +++ b/src/dynarec/la64/la64_emitter.h @@ -2975,7 +2975,7 @@ LSX instruction starts with V, LASX instruction starts with XV. if (vex.l) { \ XVILVL_##width(vd, vj, vk); \ } else { \ - VPILVL_##width(vd, vj, vk); \ + VILVL_##width(vd, vj, vk); \ } \ } while (0) @@ -2984,7 +2984,7 @@ LSX instruction starts with V, LASX instruction starts with XV. if (vex.l) { \ XVILVH_##width(vd, vj, vk); \ } else { \ - VPILVH_##width(vd, vj, vk); \ + VILVH_##width(vd, vj, vk); \ } \ } while (0) -- cgit 1.4.1