From 18320e19bc0a7f4cfd99c29088395021ceee0051 Mon Sep 17 00:00:00 2001 From: ptitSeb Date: Sat, 17 Apr 2021 14:40:19 +0200 Subject: Added 91..96 opcode and fixe REX.B 99 one ([DYNAREC] too) --- src/dynarec/dynarec_arm64_00.c | 17 ++++++++++++++++- src/emu/x64run.c | 21 ++++++++++++++++++++- 2 files changed, 36 insertions(+), 2 deletions(-) (limited to 'src') diff --git a/src/dynarec/dynarec_arm64_00.c b/src/dynarec/dynarec_arm64_00.c index 98ccde9f..c8f4f4f1 100755 --- a/src/dynarec/dynarec_arm64_00.c +++ b/src/dynarec/dynarec_arm64_00.c @@ -981,7 +981,22 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; case 0x90: - INST_NAME("NOP"); + case 0x91: + case 0x92: + case 0x93: + case 0x94: + case 0x95: + case 0x96: + case 0x97: + gd = xRAX+(opcode&0x07)+(rex.b<<3); + if(gd==xRAX) { + INST_NAME("NOP"); + } else { + INST_NAME("XCHG EAX, Reg"); + MOVxw_REG(x2, xRAX); + MOVxw_REG(xRAX, gd); + MOVxw_REG(gd, x2); + } break; case 0x98: diff --git a/src/emu/x64run.c b/src/emu/x64run.c index 1fcc6d2f..3ccdb786 100755 --- a/src/emu/x64run.c +++ b/src/emu/x64run.c @@ -510,7 +510,26 @@ x64emurun: R_ESP += sizeof(void*); } break; - case 0x90: /* NOP */ + case 0x90: /* NOP or XCHG R8, RAX*/ + case 0x91: + case 0x92: + case 0x93: + case 0x94: + case 0x95: + case 0x96: + case 0x97: /* XCHG reg,EAX */ + tmp8u = _AX+(opcode&7)+(rex.b<<3); + if(tmp8u!=_AX) { + if(rex.w) { + tmp64u = R_RAX; + R_RAX = emu->regs[tmp8u].q[0]; + emu->regs[tmp8u].q[0] = tmp64u; + } else { + tmp64u = R_EAX; + R_RAX = emu->regs[tmp8u].dword[0]; + emu->regs[tmp8u].q[0] = tmp64u; + } + } break; case 0x98: /* CWDE */ -- cgit 1.4.1