From 1d680c2039021977e5e5f2cf407f59db8e5f2629 Mon Sep 17 00:00:00 2001 From: ptitSeb Date: Wed, 31 Mar 2021 18:40:54 +0200 Subject: [DYNAREC] Added 67 8D opcode --- src/dynarec/dynarec_arm64_67.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) (limited to 'src') diff --git a/src/dynarec/dynarec_arm64_67.c b/src/dynarec/dynarec_arm64_67.c index f2c7ebe3..bef35135 100755 --- a/src/dynarec/dynarec_arm64_67.c +++ b/src/dynarec/dynarec_arm64_67.c @@ -26,6 +26,9 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int ninst, rex_t rex, int rep, int* ok, int* need_epilog) { uint8_t opcode = F8; + uint8_t nextop; + uint8_t gd, ed; + int fixedaddress; int8_t i8; int32_t i32, j32; MAYUSE(j32); @@ -40,6 +43,21 @@ uintptr_t dynarec64_67(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin switch(opcode) { + case 0x8D: + INST_NAME("LEA Gd, Ed"); + nextop=F8; + GETGD; + if(MODREG) { // reg <= reg? that's an invalid operation + DEFAULT; + } else { // mem <= reg + // should a geted32 be created, to use 32bits regs instead of 64bits? + addr = geted(dyn, addr, ninst, nextop, &ed, gd, &fixedaddress, 0, 0, rex, 0, 0); + if(ed>=xRAX && !rex.w) { + MOVw_REG(gd, gd); //truncate the higher 32bits as asked + } + } + break; + #define GO(NO, YES) \ BARRIER(2); \ JUMP(addr+i8);\ -- cgit 1.4.1