From 2017ef192f49715783e0108d8d0ac4b826b0ac45 Mon Sep 17 00:00:00 2001 From: Yang Liu Date: Wed, 31 May 2023 03:01:18 +0800 Subject: [RV64_DYNAREC] Fixed 6B IMUL opcode (#812) --- src/dynarec/rv64/dynarec_rv64_00_1.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src') diff --git a/src/dynarec/rv64/dynarec_rv64_00_1.c b/src/dynarec/rv64/dynarec_rv64_00_1.c index 875f721c..0e20d81a 100644 --- a/src/dynarec/rv64/dynarec_rv64_00_1.c +++ b/src/dynarec/rv64/dynarec_rv64_00_1.c @@ -181,12 +181,12 @@ uintptr_t dynarec64_00_1(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int // 64bits imul UFLAG_IF { MULH(x3, ed, x4); - MULW(gd, ed, x4); + MUL(gd, ed, x4); UFLAG_OP1(x3); UFLAG_RES(gd); UFLAG_DF(x3, d_imul64); } else { - MULxw(gd, ed, x4); + MUL(gd, ed, x4); } } else { // 32bits imul @@ -197,7 +197,7 @@ uintptr_t dynarec64_00_1(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int UFLAG_OP1(x3); UFLAG_DF(x3, d_imul32); } else { - MULxw(gd, ed, x4); + MULW(gd, ed, x4); } ZEROUP(gd); } -- cgit 1.4.1