From 2929d7256b90e92ef25fd298608d663b1616bebe Mon Sep 17 00:00:00 2001
From: ptitSeb <sebastien.chev@gmail.com>
Date: Fri, 2 Apr 2021 15:17:24 +0200
Subject: [DYNAREC] Added 0F 38 00 opcode

---
 src/dynarec/dynarec_arm64_0f.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

(limited to 'src')

diff --git a/src/dynarec/dynarec_arm64_0f.c b/src/dynarec/dynarec_arm64_0f.c
index 44ce3c15..630d391b 100755
--- a/src/dynarec/dynarec_arm64_0f.c
+++ b/src/dynarec/dynarec_arm64_0f.c
@@ -293,6 +293,16 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             //SSE3
             nextop=F8;
             switch(nextop) {
+                case 0x00:
+                    INST_NAME("PSHUFB Gm, Em");
+                    nextop = F8;
+                    GETGM(q0);
+                    GETEM(q1, 0);
+                    d0 = fpu_get_scratch(dyn);
+                    MOVI_8(d0, 0b10001111);
+                    VAND(d0, d0, q1);  // mask the index
+                    VTBL1_8(q0, q0, d0);
+                    break;
 
                 case 0x04:
                     INST_NAME("PMADDUBSW Gm,Em");
-- 
cgit 1.4.1