From 3f3f8b41e9343bca279800a2f117e8405c67e86d Mon Sep 17 00:00:00 2001 From: ptitSeb Date: Wed, 2 Jun 2021 15:30:43 +0200 Subject: [DYNAREC] Fix x87opcode with rounding --- src/dynarec/dynarec_arm64_db.c | 18 +++++++++--------- src/dynarec/dynarec_arm64_df.c | 27 ++++++++++++++------------- 2 files changed, 23 insertions(+), 22 deletions(-) (limited to 'src') diff --git a/src/dynarec/dynarec_arm64_db.c b/src/dynarec/dynarec_arm64_db.c index a54296bb..11d5e45b 100644 --- a/src/dynarec/dynarec_arm64_db.c +++ b/src/dynarec/dynarec_arm64_db.c @@ -186,14 +186,14 @@ uintptr_t dynarec64_DB(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin FCVTZSwD(ed, s0); WBACK; #else - MSR_fpsr(x5); - BFCw(x5, FPSR_IOC, 1); // reset IOC bit MRS_fpsr(x5); + BFCw(x5, FPSR_IOC, 1); // reset IOC bit + MSR_fpsr(x5); FRINTZD(s0, v1); VFCVTZSd(s0, s0); SQXTN_S_D(s0, s0); VSTR32_U12(s0, wback, fixedaddress); - MSR_fpsr(x5); // get back FPSR to check the IOC bit + MRS_fpsr(x5); // get back FPSR to check the IOC bit TBZ_NEXT(x5, FPSR_IOC); MOV32w(x5, 0x80000000); STRw_U12(x5, wback, fixedaddress); @@ -217,14 +217,14 @@ uintptr_t dynarec64_DB(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin FCVTZSwD(ed, s0); WBACK; #else - MSR_fpsr(x5); - BFCw(x5, FPSR_IOC, 1); // reset IOC bit MRS_fpsr(x5); + BFCw(x5, FPSR_IOC, 1); // reset IOC bit + MSR_fpsr(x5); FRINTXD(s0, v1); VFCVTZSd(s0, s0); SQXTN_S_D(s0, s0); VSTR32_U12(s0, wback, fixedaddress); - MSR_fpsr(x5); // get back FPSR to check the IOC bit + MRS_fpsr(x5); // get back FPSR to check the IOC bit TBZ_NEXT(x5, FPSR_IOC); MOV32w(x5, 0x80000000); STRw_U12(x5, wback, fixedaddress); @@ -248,14 +248,14 @@ uintptr_t dynarec64_DB(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin FCVTZSwD(ed, s0); WBACK; #else - MSR_fpsr(x5); - BFCw(x5, FPSR_IOC, 1); // reset IOC bit MRS_fpsr(x5); + BFCw(x5, FPSR_IOC, 1); // reset IOC bit + MSR_fpsr(x5); FRINTXD(s0, v1); VFCVTZSd(s0, s0); SQXTN_S_D(s0, s0); VSTR32_U12(s0, wback, fixedaddress); - MSR_fpsr(x5); // get back FPSR to check the IOC bit + MRS_fpsr(x5); // get back FPSR to check the IOC bit TBZ_NEXT(x5, FPSR_IOC); MOV32w(x5, 0x80000000); STRw_U12(x5, wback, fixedaddress); diff --git a/src/dynarec/dynarec_arm64_df.c b/src/dynarec/dynarec_arm64_df.c index e044c7f0..15d67f86 100644 --- a/src/dynarec/dynarec_arm64_df.c +++ b/src/dynarec/dynarec_arm64_df.c @@ -160,14 +160,14 @@ uintptr_t dynarec64_DF(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin SQXTN_H_S(s0, s0); VSTR16_U12(s0, wback, fixedaddress); #else - MSR_fpsr(x5); - BFCw(x5, FPSR_IOC, 1); // reset IOC bit MRS_fpsr(x5); + BFCw(x5, FPSR_IOC, 1); // reset IOC bit + MSR_fpsr(x5); VFCVTZSd(s0, v1); SQXTN_S_D(s0, s0); SQXTN_H_S(s0, s0); VSTR16_U12(s0, wback, fixedaddress); - MSR_fpsr(x5); // get back FPSR to check the IOC bit + MRS_fpsr(x5); // get back FPSR to check the IOC bit TBZ_NEXT(x5, FPSR_IOC); MOV32w(x5, 0x8000); STRH_U12(x5, wback, fixedaddress); @@ -189,15 +189,15 @@ uintptr_t dynarec64_DF(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin SQXTN_H_S(s0, s0); VSTR16_U12(s0, wback, fixedaddress); #else - MSR_fpsr(x5); - BFCw(x5, FPSR_IOC, 1); // reset IOC bit MRS_fpsr(x5); + BFCw(x5, FPSR_IOC, 1); // reset IOC bit + MSR_fpsr(x5); FRINTXD(s0, v1); VFCVTZSd(s0, s0); SQXTN_S_D(s0, s0); SQXTN_H_S(s0, s0); VSTR16_U12(s0, wback, fixedaddress); - MSR_fpsr(x5); // get back FPSR to check the IOC bit + MRS_fpsr(x5); // get back FPSR to check the IOC bit TBZ_NEXT(x5, FPSR_IOC); MOV32w(x5, 0x8000); STRH_U12(x5, wback, fixedaddress); @@ -219,15 +219,15 @@ uintptr_t dynarec64_DF(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin SQXTN_H_S(s0, s0); VSTR16_U12(s0, wback, fixedaddress); #else - MSR_fpsr(x5); - BFCw(x5, FPSR_IOC, 1); // reset IOC bit MRS_fpsr(x5); + BFCw(x5, FPSR_IOC, 1); // reset IOC bit + MSR_fpsr(x5); FRINTXD(s0, v1); VFCVTZSd(s0, s0); SQXTN_S_D(s0, s0); SQXTN_H_S(s0, s0); VSTR16_U12(s0, wback, fixedaddress); - MSR_fpsr(x5); // get back FPSR to check the IOC bit + MRS_fpsr(x5); // get back FPSR to check the IOC bit TBZ_NEXT(x5, FPSR_IOC); MOV32w(x5, 0x8000); STRH_U12(x5, wback, fixedaddress); @@ -269,17 +269,18 @@ uintptr_t dynarec64_DF(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin VFCVTZSd(s0, s0); VSTR64_U12(s0, wback, fixedaddress); #else - MSR_fpsr(x5); - BFCw(x5, FPSR_IOC, 1); // reset IOC bit MRS_fpsr(x5); + BFCw(x5, FPSR_IOC, 1); // reset IOC bit + MSR_fpsr(x5); FRINTXD(s0, v1); VFCVTZSd(s0, s0); VSTR64_U12(s0, wback, fixedaddress); - MSR_fpsr(x5); // get back FPSR to check the IOC bit - TBZ_NEXT(x5, FPSR_IOC); + MRS_fpsr(x5); // get back FPSR to check the IOC bit + TBZ_MARK3(x5, FPSR_IOC); MOV64x(x5, 0x8000000000000000LL); STRx_U12(x5, wback, fixedaddress); #endif + MARK3; x87_restoreround(dyn, ninst, u8); break; default: -- cgit 1.4.1