From 4b7e116aa7ec6234682553b0dab8affca06c4071 Mon Sep 17 00:00:00 2001 From: Yang Liu Date: Tue, 11 Feb 2025 17:53:33 +0800 Subject: [LA64_DYNAREC] Added F3 0F 52 RSQRTSS opcode (#2343) --- src/dynarec/la64/dynarec_la64_f30f.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'src') diff --git a/src/dynarec/la64/dynarec_la64_f30f.c b/src/dynarec/la64/dynarec_la64_f30f.c index e14b43f1..9cd89b42 100644 --- a/src/dynarec/la64/dynarec_la64_f30f.c +++ b/src/dynarec/la64/dynarec_la64_f30f.c @@ -184,6 +184,19 @@ uintptr_t dynarec64_F30F(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int FSQRT_S(d1, d0); VEXTRINS_W(v0, d1, 0); break; + case 0x52: + INST_NAME("RSQRTSS Gx, Ex"); + nextop = F8; + GETGX(v0, 1); + GETEXSS(v1, 0, 0); + q0 = fpu_get_scratch(dyn); + q1 = fpu_get_scratch(dyn); + LU12I_W(x3, 0x3f800); // 1.0f + MOVGR2FR_W(q0, x3); + FSQRT_S(q1, v1); + FDIV_S(q0, q0, q1); + VEXTRINS_W(v0, q0, 0); + break; case 0x53: INST_NAME("RCPSS Gx, Ex"); nextop = F8; -- cgit 1.4.1