From 574d6f9dabbca1d7d7dbcf739f4a9a394fafacde Mon Sep 17 00:00:00 2001 From: ptitSeb Date: Mon, 21 Apr 2025 17:41:04 +0200 Subject: [ARM64_DYNAREC] Small improvements to (V)MASKMOVDQU opcode --- src/dynarec/arm64/dynarec_arm64_660f.c | 8 +++----- src/dynarec/arm64/dynarec_arm64_avx_66_0f.c | 2 +- 2 files changed, 4 insertions(+), 6 deletions(-) (limited to 'src') diff --git a/src/dynarec/arm64/dynarec_arm64_660f.c b/src/dynarec/arm64/dynarec_arm64_660f.c index 81dad552..6b35db00 100644 --- a/src/dynarec/arm64/dynarec_arm64_660f.c +++ b/src/dynarec/arm64/dynarec_arm64_660f.c @@ -3335,7 +3335,7 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n case 0xF7: INST_NAME("MASKMOVDQU Gx, Ex"); nextop = F8; - GETGX(q0, 1); + GETGX(q0, 0); GETEX(q1, 0, 0); v0 = fpu_get_scratch(dyn, ninst); VLDR128_U12(v0, xRDI, 0); @@ -3344,10 +3344,8 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n else v1 = q1; VSSHRQ_8(v1, q1, 7); // get the mask - VBICQ(v0, v0, v1); // mask destination - VANDQ(v1, q0, v1); // mask source - VORRQ(v1, v1, v0); // combine - VSTR128_U12(v1, xRDI, 0); // put back + VBITQ(v0, q0, v1); + VSTR128_U12(v0, xRDI, 0); // put back break; case 0xF8: INST_NAME("PSUBB Gx,Ex"); diff --git a/src/dynarec/arm64/dynarec_arm64_avx_66_0f.c b/src/dynarec/arm64/dynarec_arm64_avx_66_0f.c index efffe8dd..4dabd1fe 100644 --- a/src/dynarec/arm64/dynarec_arm64_avx_66_0f.c +++ b/src/dynarec/arm64/dynarec_arm64_avx_66_0f.c @@ -1918,7 +1918,7 @@ uintptr_t dynarec64_AVX_66_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, case 0xF7: INST_NAME("VMASKMOVDQU Gx, Ex"); nextop = F8; - GETGX(q0, 1); + GETGX(q0, 0); GETEX(q1, 0, 0); //no vex.l case v0 = fpu_get_scratch(dyn, ninst); VLDR128_U12(v0, xRDI, 0); -- cgit 1.4.1