From 5f06d066e7d768ffb7d14a989b282822b76e4b8b Mon Sep 17 00:00:00 2001 From: ptitSeb Date: Wed, 26 Jun 2024 11:10:44 +0200 Subject: [ARM64_DYNAREC] Improved comment --- src/dynarec/arm64/dynarec_arm64_00.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/src/dynarec/arm64/dynarec_arm64_00.c b/src/dynarec/arm64/dynarec_arm64_00.c index f09f0803..6b0daf1a 100644 --- a/src/dynarec/arm64/dynarec_arm64_00.c +++ b/src/dynarec/arm64/dynarec_arm64_00.c @@ -1012,12 +1012,13 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin fpu_purgecache(dyn, ninst, 1, x1, x2, x3); \ jump_to_next(dyn, addr+i8, 0, ninst, rex.is32bits); \ } else { \ + /* inside the block, cache transform */ \ CacheTransform(dyn, ninst, cacheupd, x1, x2, x3); \ i32 = dyn->insts[dyn->insts[ninst].x64.jmp_insts].address-(dyn->native_size);\ B(i32); \ } \ } else { \ - /* inside the block */ \ + /* inside the block, no cache change */ \ i32 = dyn->insts[dyn->insts[ninst].x64.jmp_insts].address-(dyn->native_size); \ Bcond(YES, i32); \ } -- cgit 1.4.1