From 600ae18d4b8ff513e6e938ecfe7dfbc96a59d6ef Mon Sep 17 00:00:00 2001 From: Yang Liu Date: Thu, 19 Dec 2024 04:47:06 +0800 Subject: [RV64_DYNAREC] Fixed 32bits SUBz (#2170) --- src/dynarec/rv64/rv64_emitter.h | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/src/dynarec/rv64/rv64_emitter.h b/src/dynarec/rv64/rv64_emitter.h index 7f360040..5c3279ea 100644 --- a/src/dynarec/rv64/rv64_emitter.h +++ b/src/dynarec/rv64/rv64_emitter.h @@ -124,7 +124,15 @@ // rd = rs1 - rs2 #define SUBxw(rd, rs1, rs2) EMIT(R_type(0b0100000, rs2, rs1, 0b000, rd, rex.w ? 0b0110011 : 0b0111011)) // rd = rs1 - rs2 -#define SUBz(rd, rs1, rs2) EMIT(R_type(0b0100000, rs2, rs1, 0b000, rd, rex.is32bits ? 0b0111011 : 0b0110011)) +#define SUBz(rd, rs1, rs2) \ + do { \ + if (!rex.is32bits) { \ + SUB(rd, rs1, rs2); \ + } else { \ + SUB(rd, rs1, rs2); \ + ZEROUP(rd); \ + } \ + } while (0) // rd = rs1<