From 64a6a28c3090f87a2c666906bd25c5fca9a436d6 Mon Sep 17 00:00:00 2001 From: ptitSeb Date: Fri, 7 Apr 2023 13:15:58 +0200 Subject: [ARM64_DYNAREC] Added FASTNAN=0 path for MAXPD/MINPD --- src/dynarec/arm64/dynarec_arm64_660f.c | 26 ++++++++++++++++++++++---- 1 file changed, 22 insertions(+), 4 deletions(-) (limited to 'src') diff --git a/src/dynarec/arm64/dynarec_arm64_660f.c b/src/dynarec/arm64/dynarec_arm64_660f.c index 642f3afc..c457e760 100755 --- a/src/dynarec/arm64/dynarec_arm64_660f.c +++ b/src/dynarec/arm64/dynarec_arm64_660f.c @@ -1120,9 +1120,18 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n case 0x5D: INST_NAME("MINPD Gx, Ex"); nextop = F8; - GETEX(q0, 0, 0); GETGX(v0, 1); - VFMINQD(v0, v0, q0); + GETEX(v1, 0, 0); + // FMIN/FMAX wll not copy the value if v0[x] is NaN + // but x86 will copy if either v0[x] or v1[x] is NaN, so lets force a copy if source is NaN + if(!box64_dynarec_fastnan && v0!=v1) { + q0 = fpu_get_scratch(dyn); + VFCMEQQD(q0, v0, v0); // 0 is NaN, 1 is not NaN, so MASK for NaN + VANDQ(v0, v0, q0); + VBICQ(q0, v1, q0); + VORRQ(v0, v0, q0); + } + VFMINQD(v0, v0, v1); break; case 0x5E: INST_NAME("DIVPD Gx, Ex"); @@ -1147,9 +1156,18 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n case 0x5F: INST_NAME("MAXPD Gx, Ex"); nextop = F8; - GETEX(q0, 0, 0); GETGX(v0, 1); - VFMAXQD(v0, v0, q0); + GETEX(v1, 0, 0); + // FMIN/FMAX wll not copy the value if v0[x] is NaN + // but x86 will copy if either v0[x] or v1[x] is NaN, so lets force a copy if source is NaN + if(!box64_dynarec_fastnan && v0!=v1) { + q0 = fpu_get_scratch(dyn); + VFCMEQQD(q0, v0, v0); // 0 is NaN, 1 is not NaN, so MASK for NaN + VANDQ(v0, v0, q0); + VBICQ(q0, v1, q0); + VORRQ(v0, v0, q0); + } + VFMAXQD(v0, v0, v1); break; case 0x60: INST_NAME("PUNPCKLBW Gx,Ex"); -- cgit 1.4.1