From 7ca8dc90439ceb97d359f89555f8059f4db955bf Mon Sep 17 00:00:00 2001
From: ptitSeb <sebastien.chev@gmail.com>
Date: Sat, 6 Mar 2021 18:15:30 +0100
Subject: Added a few SSE2 opcodes

---
 src/emu/x64runf20f.c | 35 ++++++++++++++++++++++++++++++++++-
 src/emu/x64runf30f.c |  5 ++++-
 2 files changed, 38 insertions(+), 2 deletions(-)

(limited to 'src')

diff --git a/src/emu/x64runf20f.c b/src/emu/x64runf20f.c
index 3e6b29b3..a462f74a 100644
--- a/src/emu/x64runf20f.c
+++ b/src/emu/x64runf20f.c
@@ -30,7 +30,6 @@ int RunF20F(x64emu_t *emu, rex_t rex)
 {
     uint8_t opcode;
     uint8_t nextop;
-    int32_t tmp32s;
     reg64_t *oped, *opgd;
     sse_regs_t *opex, *opgx;
 
@@ -55,6 +54,40 @@ int RunF20F(x64emu_t *emu, rex_t rex)
         EX->q[0] = GX->q[0];
         break;
 
+    case 0x2A:  /* CVTSI2SD Gx, Ed */
+        nextop = F8;
+        GETED(0);
+        GETGX;
+        if(rex.w)
+            GX->d[0] = ED->sq[0];
+        else
+            GX->d[0] = ED->sdword[0];
+        break;
+
+    case 0x2C:  /* CVTTSD2SI Gd, Ex */
+        nextop = F8;
+        GETEX(0);
+        GETGD;
+        if(rex.w)
+            GD->sq[0] = EX->d[0];
+        else
+            GD->sdword[0] = EX->d[0];
+        break;
+
+    case 0x59:  /* MULSD Gx, Ex */
+        nextop = F8;
+        GETEX(0);
+        GETGX;
+        GX->d[0] *= EX->d[0];
+        break;
+
+    case 0x5E:  /* DIVSD Gx, Ex */
+        nextop = F8;
+        GETEX(0);
+        GETGX;
+        GX->d[0] /= EX->d[0];
+        break;
+
     default:
         return 1;
     }
diff --git a/src/emu/x64runf30f.c b/src/emu/x64runf30f.c
index e4a3f643..0369ad3d 100644
--- a/src/emu/x64runf30f.c
+++ b/src/emu/x64runf30f.c
@@ -60,7 +60,10 @@ int RunF30F(x64emu_t *emu, rex_t rex)
         nextop = F8;
         GETED(0);
         GETGX;
-        GX->f[0] = ED->sdword[0];
+        if(rex.w)
+            GX->f[0] = ED->sq[0];
+        else
+            GX->f[0] = ED->sdword[0];
         break;
 
     case 0x59:  /* MULSS Gx, Ex */
-- 
cgit 1.4.1