From 7fa3a1e627fe815b05751c223f4923e0d34addd1 Mon Sep 17 00:00:00 2001 From: ptitSeb Date: Mon, 17 Mar 2025 15:39:02 +0100 Subject: [ARM64_DYNAREC] Simplified 8F opcode, so special cases will be handled in signal directly if needed --- src/dynarec/arm64/dynarec_arm64_00.c | 12 +++--------- src/libtools/signals.c | 4 ++++ 2 files changed, 7 insertions(+), 9 deletions(-) (limited to 'src') diff --git a/src/dynarec/arm64/dynarec_arm64_00.c b/src/dynarec/arm64/dynarec_arm64_00.c index dcf2037a..3488d92a 100644 --- a/src/dynarec/arm64/dynarec_arm64_00.c +++ b/src/dynarec/arm64/dynarec_arm64_00.c @@ -1559,15 +1559,9 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin POP1z(TO_NAT((nextop & 7) + (rex.b << 3))); } else { POP1z(x2); // so this can handle POP [ESP] and maybe some variant too - addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<3, 7, rex, NULL, 0, 0); - if(ed==xRSP) { - STz(x2, ed, fixedaddress); - } else { - // complicated to just allow a segfault that can be recovered correctly - SUBz_U12(xRSP, xRSP, rex.is32bits?4:8); - STz(x2, ed, fixedaddress); - ADDz_U12(xRSP, xRSP, rex.is32bits?4:8); - } + addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, &unscaled, 0xfff<<(2+rex.is32bits), (1<<(2+rex.is32bits))-1, rex, NULL, 0, 0); + STz(x2, ed, fixedaddress); + SMWRITE(); } break; case 0x90: diff --git a/src/libtools/signals.c b/src/libtools/signals.c index 0abea7ee..b5b0313a 100644 --- a/src/libtools/signals.c +++ b/src/libtools/signals.c @@ -589,6 +589,10 @@ void adjustregs(x64emu_t* emu) { R_RSI-=step; return; } + if(mem[idx+0]==0x8F && (mem[idx+1]&0xc0)!=0xc0) { + // POP Ed, issue on write address, restore RSP as in before the pop + R_RSP -= is66?2:(rex.is32bits?4:8); + } #elif defined(LA64) #elif defined(RV64) #else -- cgit 1.4.1