From 8670e9e5aa8104c88bc850f663ff18ffabe42b4e Mon Sep 17 00:00:00 2001 From: Yang Liu Date: Fri, 31 Mar 2023 01:54:34 +0800 Subject: [RV64_DYNAREC] Added 0F 2E,2F opcode & some fixes in printer (#653) * [RV64_DYNAREC] Fixed some issues in printer * [RV64_DYNAREC] Added 0F 2E,2F opcode --- src/dynarec/rv64/dynarec_rv64_0f.c | 38 +++++++++++++++++++++++++++++++++++++- src/dynarec/rv64/rv64_printer.c | 10 ++++++---- 2 files changed, 43 insertions(+), 5 deletions(-) (limited to 'src') diff --git a/src/dynarec/rv64/dynarec_rv64_0f.c b/src/dynarec/rv64/dynarec_rv64_0f.c index 9defa364..84d0b0a6 100644 --- a/src/dynarec/rv64/dynarec_rv64_0f.c +++ b/src/dynarec/rv64/dynarec_rv64_0f.c @@ -200,7 +200,43 @@ uintptr_t dynarec64_0F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int ni SD(x3, wback, fixedaddress+0); SD(x4, wback, fixedaddress+8); break; - + case 0x2E: + // no special check... + case 0x2F: + if(opcode==0x2F) {INST_NAME("COMISS Gx, Ex");} else {INST_NAME("UCOMISS Gx, Ex");} + SETFLAGS(X_ALL, SF_SET); + nextop = F8; + GETGX(x3); + GETEXSS(v0, 0); + CLEAR_FLAGS(); + // if isnan(gd) || isnan(v0) + IFX(X_ZF | X_PF | X_CF) { + FLW(gd, x3, 0); + FEQS(x3, gd, gd); + FEQS(x2, v0, v0); + AND(x2, x2, x3); + XORI(x2, x2, 1); + BEQ_MARK(x2, xZR); + ORI(xFlags, xFlags, (1< #include #include +#include #include "rv64_printer.h" #include "debug.h" @@ -416,14 +417,15 @@ static inline insn_t insn_ciwtype_read(uint16_t data) #define PRINT_rd_imm_rs1() snprintf(buff, sizeof(buff), "%s\t%s, %d(%s)", insn.name, RN(rd), insn.imm, gpnames[insn.rs1]); return buff #define PRINT_rs2_imm_rs1() snprintf(buff, sizeof(buff), "%s\t%s, %d(%s)", insn.name, RN(rs2), insn.imm, gpnames[insn.rs1]); return buff #define PRINT_rd_imm() snprintf(buff, sizeof(buff), "%s\t%s, %d", insn.name, RN(rd), insn.imm); return buff -#define PRINT_rd_imm_rel() snprintf(buff, sizeof(buff), "%s\t%s, pc%+d # 0x%llx", insn.name, RN(rd), insn.imm, insn.imm+(uint64_t)addr); return buff -#define PRINT_imm_rel() snprintf(buff, sizeof(buff), "%s\tpc%+d # 0x%llx", insn.name, insn.imm, insn.imm+(uint64_t)addr); return buff +#define PRINT_rd_imm_rel() snprintf(buff, sizeof(buff), "%s\t%s, pc%+d # 0x%"PRIx64, insn.name, RN(rd), insn.imm, insn.imm+(uint64_t)addr); return buff +#define PRINT_imm_rel() snprintf(buff, sizeof(buff), "%s\tpc%+d # 0x%"PRIx64, insn.name, insn.imm, insn.imm+(uint64_t)addr); return buff #define PRINT_rd_immx() snprintf(buff, sizeof(buff), "%s\t%s, 0x%x", insn.name, RN(rd), insn.imm); return buff #define PRINT_rs1_rs2_imm() snprintf(buff, sizeof(buff), "%s\t%s, %s, %d", insn.name, RN(rs1), RN(rs2), insn.imm); return buff -#define PRINT_rs1_rs2_imm_rel() snprintf(buff, sizeof(buff), "%s\t%s, %s, pc%+d # 0x%llx", insn.name, RN(rs1), RN(rs2), insn.imm, insn.imm+(uint64_t)addr); return buff +#define PRINT_rs1_rs2_imm_rel() snprintf(buff, sizeof(buff), "%s\t%s, %s, pc%+d # 0x%"PRIx64, insn.name, RN(rs1), RN(rs2), insn.imm, insn.imm+(uint64_t)addr); return buff #define PRINT_fd_fs1() snprintf(buff, sizeof(buff), "%s\t%s, %s", insn.name, fpnames[insn.rd], fpnames[insn.rs1]); return buff #define PRINT_xd_fs1() snprintf(buff, sizeof(buff), "%s\t%s, %s", insn.name, gpnames[insn.rd], fpnames[insn.rs1]); return buff #define PRINT_fd_xs1() snprintf(buff, sizeof(buff), "%s\t%s, %s", insn.name, fpnames[insn.rd], gpnames[insn.rs1]); return buff +#define PRINT_rd_fs1_fs2() snprintf(buff, sizeof(buff), "%s\t%s, %s, %s", insn.name, gpnames[insn.rd], RN(rs1), RN(rs2)); return buff #define PRINT_rd_rs1_aqrl() snprintf(buff, sizeof(buff), "%s%s%s\t%s, (%s)", insn.name, aq?".aq":"", rl?".rl":"", gpnames[insn.rd], gpnames[insn.rs1]); return buff #define PRINT_rd_rs1_rs2_aqrl() snprintf(buff, sizeof(buff), "%s%s%s\t%s, %s, (%s)", insn.name, aq?".aq":"", rl?".rl":"", gpnames[insn.rd], gpnames[insn.rs1], gpnames[insn.rs2]); return buff @@ -1221,7 +1223,7 @@ const char* rv64_print(uint32_t data, uintptr_t addr) insn.name = "feq.s"; break; } - PRINT_rd_rs1_rs2(); + PRINT_rd_fs1_fs2(); } case 0x51: { uint32_t funct3 = FUNCT3(data); -- cgit 1.4.1