From 899405456bab49c3afa255ece099e1cb41e6ddf2 Mon Sep 17 00:00:00 2001 From: ptitSeb Date: Sat, 2 Dec 2023 22:20:02 +0100 Subject: [ARM64_DYNAREC] Added optionnal memory barrier to MOVS/STOS --- src/dynarec/arm64/dynarec_arm64_00.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'src') diff --git a/src/dynarec/arm64/dynarec_arm64_00.c b/src/dynarec/arm64/dynarec_arm64_00.c index d5e998c6..12a6d4f1 100644 --- a/src/dynarec/arm64/dynarec_arm64_00.c +++ b/src/dynarec/arm64/dynarec_arm64_00.c @@ -1397,6 +1397,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin SMWRITELOCK(lock); break; case 0xA4: + SMREAD(); if(rep) { INST_NAME("REP MOVSB"); CBZx_NEXT(xRCX); @@ -1421,8 +1422,10 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin ADDx_REG(xRSI, xRSI, x3); ADDx_REG(xRDI, xRDI, x3); } + SMWRITE(); break; case 0xA5: + SMREAD(); if(rep) { INST_NAME("REP MOVSD"); CBZx_NEXT(xRCX); @@ -1447,6 +1450,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin ADDx_REG(xRSI, xRSI, x3); ADDx_REG(xRDI, xRDI, x3); } + SMWRITE(); break; case 0xA6: switch(rep) { @@ -1562,6 +1566,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin STRB_U12(xRAX, xRDI, 0); ADDx_REG(xRDI, xRDI, x3); } + SMWRITE(); break; case 0xAB: if(rep) { @@ -1584,6 +1589,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin STRxw_U12(xRAX, xRDI, 0); ADDx_REG(xRDI, xRDI, x3); } + SMWRITE(); break; case 0xAC: if(rep) { -- cgit 1.4.1