From 8d0a7d322eef487c1e7f634719cd76b848497f13 Mon Sep 17 00:00:00 2001 From: ptitSeb Date: Sun, 25 Jun 2023 15:20:37 +0200 Subject: [32BITS][ARM64_DYNAREC] Added 1E/1F opcodes --- src/dynarec/arm64/dynarec_arm64_00.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/src/dynarec/arm64/dynarec_arm64_00.c b/src/dynarec/arm64/dynarec_arm64_00.c index 2a5d4faf..5b407f5f 100755 --- a/src/dynarec/arm64/dynarec_arm64_00.c +++ b/src/dynarec/arm64/dynarec_arm64_00.c @@ -277,7 +277,25 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin MOV64xw(x2, i64); emit_sbb32(dyn, ninst, rex, xRAX, x2, x3, x4); break; - + case 0x1E: + if(rex.is32bits) { + INST_NAME("PUSH DS"); + LDRH_U12(x1, xEmu, offsetof(x64emu_t, segs[_DS])); + PUSH1_32(x1); + } else { + DEFAULT; + } + break; + case 0x1F: + if(rex.is32bits) { + INST_NAME("POP DS"); + POP1_32(x1); + STRH_U12(x1, xEmu, offsetof(x64emu_t, segs[_DS])); + STRw_U12(xZR, xEmu, offsetof(x64emu_t, segs_serial[_DS])); + } else { + DEFAULT; + } + break; case 0x20: INST_NAME("AND Eb, Gb"); SETFLAGS(X_ALL, SF_SET_PENDING); -- cgit 1.4.1