From 8ec2851439b2486531c8d2b3e38b22972b1f53b6 Mon Sep 17 00:00:00 2001 From: ptitSeb Date: Mon, 22 Mar 2021 14:08:03 +0100 Subject: [DYNAREC] Added 66 0F 6F opcode --- src/dynarec/dynarec_arm64_660f.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) (limited to 'src') diff --git a/src/dynarec/dynarec_arm64_660f.c b/src/dynarec/dynarec_arm64_660f.c index a55e89c8..a168dd24 100755 --- a/src/dynarec/dynarec_arm64_660f.c +++ b/src/dynarec/dynarec_arm64_660f.c @@ -135,7 +135,7 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n case 0x6E: INST_NAME("MOVD Gx, Ed"); nextop = F8; - gd = ((nextop&0x38)>>3)+(rex.r<<3); + GETG; GETED(0); v0 = sse_get_reg_empty(dyn, ninst, x1, gd); if(rex.w) { @@ -145,6 +145,19 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n VMOVQSfrom(v0, 0, ed); } break; + case 0x6F: + INST_NAME("MOVDQA Gx,Ex"); + nextop = F8; + GETG; + v0 = sse_get_reg_empty(dyn, ninst, x1, gd); + if(MODREG) { + v1 = sse_get_reg(dyn, ninst, x1, (nextop&7)+(rex.b<<3)); + VMOVQ(v0, v1); + } else { + addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<4, 15, rex, 0, 0); + VLDR128_U12(v0, ed, fixedaddress); + } + break; case 0x7E: INST_NAME("MOVD Ed,Gx"); -- cgit 1.4.1