From 9a4a62ff2ddb9ec6286780f046ea785b2bb54306 Mon Sep 17 00:00:00 2001
From: ptitSeb <sebastien.chev@gmail.com>
Date: Thu, 7 Mar 2024 18:51:53 +0100
Subject: [ARM64_DYNAREC] Added 0F E1 opcode

---
 src/dynarec/arm64/dynarec_arm64_0f.c | 15 ++++++++++++++-
 1 file changed, 14 insertions(+), 1 deletion(-)

(limited to 'src')

diff --git a/src/dynarec/arm64/dynarec_arm64_0f.c b/src/dynarec/arm64/dynarec_arm64_0f.c
index 9e4bd704..0bb9dffc 100644
--- a/src/dynarec/arm64/dynarec_arm64_0f.c
+++ b/src/dynarec/arm64/dynarec_arm64_0f.c
@@ -2480,7 +2480,20 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
             GETEM(v1, 0);
             URHADD_8(v0, v0, v1);
             break;
-
+        case 0xE1:
+            INST_NAME("PSRAW Gm,Em");
+            nextop = F8;
+            GETGM(d0);
+            GETEM(d1, 0);
+            v0 = fpu_get_scratch(dyn);
+            v1 = fpu_get_scratch(dyn);
+            UQXTN_32(v0, d1);
+            MOVI_32(v1, 15);
+            UMIN_32(v0, v0, v1);    // limit to 0 .. +15 values
+            NEG_32(v0, v0);
+            VDUP_16(v0, v0, 0);    // only the low 8bits will be used anyway
+            SSHL_16(d0, d0, v0);
+            break;
         case 0xE2:
             INST_NAME("PSRAD Gm,Em");
             nextop = F8;
-- 
cgit 1.4.1