From 9bfc027b15db4126d5e932a0eac889e2dbd7cc03 Mon Sep 17 00:00:00 2001 From: ptitSeb Date: Sun, 21 Mar 2021 12:46:41 +0100 Subject: [DYNAREC] Added 66 0F 28/29 opcodes --- src/dynarec/dynarec_arm64_660f.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) (limited to 'src') diff --git a/src/dynarec/dynarec_arm64_660f.c b/src/dynarec/dynarec_arm64_660f.c index 6069c3ef..8b04613e 100755 --- a/src/dynarec/dynarec_arm64_660f.c +++ b/src/dynarec/dynarec_arm64_660f.c @@ -68,6 +68,36 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n FAKEED; break; + case 0x28: + INST_NAME("MOVAPD Gx,Ex"); + nextop = F8; + gd = ((nextop&0x38)>>3) + (rex.r<<3); + if(MODREG) { + ed = (nextop&7)+(rex.b<<3); + v1 = sse_get_reg(dyn, ninst, x1, ed); + v0 = sse_get_reg_empty(dyn, ninst, x1, gd); + VMOVQ(v0, v1); + } else { + v0 = sse_get_reg_empty(dyn, ninst, x1, gd); + addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<4, 15, rex, 0, 0); + VLDR128_U12(v0, ed, fixedaddress); + } + break; + case 0x29: + INST_NAME("MOVAPD Ex,Gx"); + nextop = F8; + gd = ((nextop&0x38)>>3) + (rex.r<<3); + v0 = sse_get_reg(dyn, ninst, x1, gd); + if(MODREG) { + ed = (nextop&7)+(rex.b<<3); + v1 = sse_get_reg_empty(dyn, ninst, x1, ed); + VMOVQ(v1, v0); + } else { + addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<4, 15, rex, 0, 0); + VSTR128_U12(v0, ed, fixedaddress); + } + break; + #define GO(GETFLAGS, NO, YES, F) \ READFLAGS(F); \ GETFLAGS; \ -- cgit 1.4.1