From a66b4e257ab32907a5484000e04af8a4b96d8eb9 Mon Sep 17 00:00:00 2001 From: ptitSeb Date: Fri, 14 Jun 2024 11:25:50 +0200 Subject: [ARM64_DYNAREC] Added AVX.F2.0F 7C/F0 opcodes --- src/dynarec/arm64/dynarec_arm64_avx_f2_0f.c | 33 +++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) (limited to 'src') diff --git a/src/dynarec/arm64/dynarec_arm64_avx_f2_0f.c b/src/dynarec/arm64/dynarec_arm64_avx_f2_0f.c index de57bff9..96862de4 100644 --- a/src/dynarec/arm64/dynarec_arm64_avx_f2_0f.c +++ b/src/dynarec/arm64/dynarec_arm64_avx_f2_0f.c @@ -352,6 +352,16 @@ uintptr_t dynarec64_AVX_F2_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, if(!vex.l) YMM0(gd); break; + case 0x7C: + INST_NAME("VHADDPS Gx, Vx, Ex"); + nextop = F8; + for(int l=0; l<1+vex.l; ++l) { + if(!l) { GETGX_empty_VXEX(v0, v2, v1, 0); } else { GETGY_empty_VYEY(v0, v2, v1); } + VFADDPQS(v0, v2, v1); + } + if(!vex.l) YMM0(gd); + break; + case 0xC2: INST_NAME("CMPSD Gx, Ex, Ib"); nextop = F8; @@ -423,6 +433,29 @@ uintptr_t dynarec64_AVX_F2_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, YMM0(gd); break; + case 0xF0: + INST_NAME("LDDQU Gx,Ex"); + nextop = F8; + GETG; + if(MODREG) { + v1 = sse_get_reg(dyn, ninst, x1, (nextop&7)+(rex.b<<3), 0); + v0 = sse_get_reg_empty(dyn, ninst, x1, gd); + VMOVQ(v0, v1); + if(vex.l) { + GETGY_empty_EY(v0, v1); + VMOVQ(v0, v1); + } + } else { + v0 = sse_get_reg_empty(dyn, ninst, x1, gd); + SMREAD(); + addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, NULL, 0xffe<<4, 7, rex, NULL, 0, 0); + VLDR128_U12(v0, ed, fixedaddress); + v0 = ymm_get_reg_empty(dyn, ninst, x1, gd, -1, -1, -1); + VLDR128_U12(v0, ed, fixedaddress+16); + } + if(!vex.l) YMM0(gd); + break; + default: DEFAULT; } -- cgit 1.4.1