From abcb12f9ed9b154bcd3594686d7209b7dc3523ac Mon Sep 17 00:00:00 2001 From: ptitSeb Date: Mon, 5 Jul 2021 10:25:09 +0200 Subject: Added 0F C3 opcode ([DYNAREC] too) (for #20) --- src/dynarec/dynarec_arm64_0f.c | 12 +++++++++++- src/emu/x64run0f.c | 16 ++++++++++++++-- 2 files changed, 25 insertions(+), 3 deletions(-) (limited to 'src') diff --git a/src/dynarec/dynarec_arm64_0f.c b/src/dynarec/dynarec_arm64_0f.c index 8c648d6e..e65a5aaa 100755 --- a/src/dynarec/dynarec_arm64_0f.c +++ b/src/dynarec/dynarec_arm64_0f.c @@ -1496,7 +1496,17 @@ uintptr_t dynarec64_0F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin break; // not NaN } break; - + case 0xC3: + INST_NAME("MOVNTI Ed, Gd"); + nextop=F8; + GETGD; + if(MODREG) { // reg <= reg + MOVxw_REG(xRAX+(nextop&7)+(rex.b<<3), gd); + } else { // mem <= reg + addr = geted(dyn, addr, ninst, nextop, &ed, x2, &fixedaddress, 0xfff<<(2+rex.w), (1<<(2+rex.w))-1, rex, 0, 0); + STRxw_U12(gd, ed, fixedaddress); + } + break; case 0xC4: INST_NAME("PINSRW Gm,Ed,Ib"); nextop = F8; diff --git a/src/emu/x64run0f.c b/src/emu/x64run0f.c index 81167450..8bb36279 100644 --- a/src/emu/x64run0f.c +++ b/src/emu/x64run0f.c @@ -1156,8 +1156,20 @@ int Run0F(x64emu_t *emu, rex_t rex) GX->ud[i]=(tmp8s)?0xffffffff:0; } break; - - case 0xC4: /* PINSRW Gm,Ew,Ib */ + case 0xC3: /* MOVNTI Ed, Gd */ + nextop = F8; + GETED(0); + GETGD; + if(rex.w) + ED->q[0] = GD->q[0]; + else { + if(MODREG) + ED->q[0] = GD->dword[0]; + else + ED->dword[0] = GD->dword[0]; + } + break; + case 0xC4: /* PINSRW Gm,Ew,Ib */ nextop = F8; GETED(0); GETGM; -- cgit 1.4.1