From b19dc0db89ab4fdaa1a7c379e30d608a89f29163 Mon Sep 17 00:00:00 2001 From: ptitSeb Date: Mon, 9 Jun 2025 11:07:55 +0200 Subject: [ARM64_DYNAREC] Added 64/65 0F BF opcode (for #2716) --- src/dynarec/arm64/arm64_emitter.h | 1 + src/dynarec/arm64/dynarec_arm64_64.c | 21 +++++++++++++++++++++ 2 files changed, 22 insertions(+) (limited to 'src') diff --git a/src/dynarec/arm64/arm64_emitter.h b/src/dynarec/arm64/arm64_emitter.h index 7cc424fb..680647b4 100644 --- a/src/dynarec/arm64/arm64_emitter.h +++ b/src/dynarec/arm64/arm64_emitter.h @@ -338,6 +338,7 @@ int convert_bitmask(uint64_t bitmask); #define LDRSW_REG(Rt, Rn, Rm) EMIT(LDRS_REG_gen(0b10, Rm, 0b011, 0, Rn, Rt)) #define LDRSW_REG_SXTW(Rt, Rn, Rm) EMIT(LDRS_REG_gen(0b10, Rm, 0b110, 0, Rn, Rt)) #define LDRSW_REGz(Rt, Rn, Rm) EMIT(LDRS_REG_gen(0b10, Rm, rex.is32bits?0b110:0b011, 0, Rn, Rt)) +#define LDRSH_REGz(Rt, Rn, Rm) EMIT(LDRS_REG_gen(0b01, Rm, rex.is32bits?0b110:0b011, 0, Rn, Rt)) #define LDR_PC_gen(opc, imm19, Rt) ((opc)<<30 | 0b011<<27 | (imm19)<<5 | (Rt)) #define LDRx_literal(Rt, imm21) EMIT(LDR_PC_gen(0b01, (((int64_t)(imm21))>>2)&0x7FFFF, Rt)) diff --git a/src/dynarec/arm64/dynarec_arm64_64.c b/src/dynarec/arm64/dynarec_arm64_64.c index f5c46cd2..e8c238ae 100644 --- a/src/dynarec/arm64/dynarec_arm64_64.c +++ b/src/dynarec/arm64/dynarec_arm64_64.c @@ -370,6 +370,27 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin } break; + case 0xBF: + switch(rep) { + case 0: + INST_NAME("MOVSX Gd, Ew"); + nextop = F8; + grab_segdata(dyn, addr, ninst, x4, seg, (MODREG)); + GETGD; + if(MODREG) { + ed = TO_NAT((nextop & 7) + (rex.b << 3)); + SXTHxw(gd, ed); + } else { + SMREAD(); + addr = geted(dyn, addr, ninst, nextop, &ed, x3, &fixedaddress, NULL, 0, 0, rex, NULL, 0, 0); + LDRSH_REGz(gd, x4, ed); + } + break; + default: + DEFAULT; + } + break; + default: DEFAULT; } -- cgit 1.4.1