From bfea73d5d8003ab48f078d64c5836b7691fc8fd3 Mon Sep 17 00:00:00 2001 From: ptitSeb Date: Thu, 26 May 2022 18:02:11 +0200 Subject: [DYNAREC] Fix an issue with LOCK ADD Ew, Iw opcode --- src/dynarec/arm64/dynarec_arm64_66f0.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src') diff --git a/src/dynarec/arm64/dynarec_arm64_66f0.c b/src/dynarec/arm64/dynarec_arm64_66f0.c index 0bd95f48..c041febc 100644 --- a/src/dynarec/arm64/dynarec_arm64_66f0.c +++ b/src/dynarec/arm64/dynarec_arm64_66f0.c @@ -83,7 +83,7 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n if(opcode==0x81) { INST_NAME("LOCK ADD Ew, Iw"); } else { - INST_NAME("LOCK ADD Ew, Iw"); + INST_NAME("LOCK ADD Ew, Ib"); } SETFLAGS(X_ALL, SF_SET_PENDING); if(MODREG) { @@ -95,7 +95,7 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n BFIx(ed, x6, 0, 16); } else { addr = geted(dyn, addr, ninst, nextop, &wback, x2, &fixedaddress, 0, 0, rex, 0, (opcode==0x81)?2:1); - if(opcode==0x81) i32 = F32S; else i32 = F8S; + if(opcode==0x81) i32 = F16S; else i32 = F8S; MOV32w(x5, i32); TSTx_mask(wback, 1, 0, 0); // mask=1 B_MARK(cNE); @@ -116,7 +116,7 @@ uintptr_t dynarec64_66F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n } break; case 1: //OR - if(opcode==0x81) {INST_NAME("LOCK OR Ew, Iw");} else {INST_NAME("LOCK OR Ew, Iw");} + if(opcode==0x81) {INST_NAME("LOCK OR Ew, Iw");} else {INST_NAME("LOCK OR Ew, Ib");} SETFLAGS(X_ALL, SF_SET_PENDING); if(MODREG) { if(opcode==0x81) i32 = F16S; else i32 = F8S; -- cgit 1.4.1