From c43f4ea08058436ccbb7a5e5cde473f32ef1105a Mon Sep 17 00:00:00 2001 From: ptitSeb Date: Fri, 7 Apr 2023 10:35:36 +0200 Subject: [ARM64_DYNAREC] Small optim to FASTROUND=0 part for F3 0F 2C/2D opcodes --- src/dynarec/arm64/dynarec_arm64_f30f.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src') diff --git a/src/dynarec/arm64/dynarec_arm64_f30f.c b/src/dynarec/arm64/dynarec_arm64_f30f.c index 9c905433..028ee7f4 100755 --- a/src/dynarec/arm64/dynarec_arm64_f30f.c +++ b/src/dynarec/arm64/dynarec_arm64_f30f.c @@ -144,7 +144,7 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n if(rex.w) { ORRx_mask(gd, xZR, 1, 1, 0); //0x8000000000000000 } else { - MOV32w(gd, 0x80000000); + ORRw_mask(gd, xZR, 1, 0); //0x80000000 } } break; @@ -169,7 +169,7 @@ uintptr_t dynarec64_F30F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n if(rex.w) { ORRx_mask(gd, xZR, 1, 1, 0); //0x8000000000000000 } else { - MOV32w(gd, 0x80000000); + ORRw_mask(gd, xZR, 1, 0); //0x80000000 } } break; -- cgit 1.4.1