From c7cc78194ffda7cd69797bc4e5f606465d32de88 Mon Sep 17 00:00:00 2001 From: ptitSeb Date: Tue, 26 Nov 2024 10:34:12 +0100 Subject: [ARM64_DYNAREC][TRACE] Use BLR on ret/retn with TRACE to allow relevant debug informations on bad returns --- src/dynarec/arm64/dynarec_arm64_helper.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'src') diff --git a/src/dynarec/arm64/dynarec_arm64_helper.c b/src/dynarec/arm64/dynarec_arm64_helper.c index aca3e788..37f6de8e 100644 --- a/src/dynarec/arm64/dynarec_arm64_helper.c +++ b/src/dynarec/arm64/dynarec_arm64_helper.c @@ -652,7 +652,11 @@ void ret_to_epilog(dynarec_arm_t* dyn, int ninst, rex_t rex) LDRx_REG_LSL3(x2, x2, x3); UBFXx(x3, xRIP, JMPTABL_START0, JMPTABL_SHIFT0); LDRx_REG_LSL3(x2, x2, x3); + #ifdef HAVE_TRACE + BLR(x2); + #else BR(x2); + #endif CLEARIP(); } @@ -695,7 +699,11 @@ void retn_to_epilog(dynarec_arm_t* dyn, int ninst, rex_t rex, int n) LDRx_REG_LSL3(x2, x2, x3); UBFXx(x3, xRIP, JMPTABL_START0, JMPTABL_SHIFT0); LDRx_REG_LSL3(x2, x2, x3); + #ifdef HAVE_TRACE + BLR(x2); + #else BR(x2); + #endif CLEARIP(); } -- cgit 1.4.1