From da19b2008a8e4afc75ec46a43453dcc93256d48e Mon Sep 17 00:00:00 2001 From: ptitSeb Date: Tue, 17 Oct 2023 18:17:35 +0200 Subject: [ARM64_DYNAREC] More fixes to F0 0F C7 opcode with Atomics extension --- src/dynarec/arm64/dynarec_arm64_f0.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'src') diff --git a/src/dynarec/arm64/dynarec_arm64_f0.c b/src/dynarec/arm64/dynarec_arm64_f0.c index f795cf92..b5e9fe3c 100644 --- a/src/dynarec/arm64/dynarec_arm64_f0.c +++ b/src/dynarec/arm64/dynarec_arm64_f0.c @@ -469,11 +469,13 @@ uintptr_t dynarec64_F0(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin CASPALxw(x2, x4, wback); UFLAG_IF { CMPSxw_REG(x2, xRAX); - CSETw(x1, cEQ); + CSETw(x4, cEQ); CMPSxw_REG(x3, xRDX); - CSETw(x2, cEQ); - ANDw_REG(x1, x1, x2); + CSETw(x5, cEQ); + ANDw_REG(x1, x4, x5); } + MOVx_REG(xRAX, x2); + MOVx_REG(xRDX, x3); } else { MARKLOCK; LDAXPxw(x2, x3, wback); -- cgit 1.4.1